[Intel-wired-lan] [next-queue v5 11/17] fm10k: Add support for ITR scaling based on PCIe link speed

[Singh, Krishneil K]

-----Original Message-----
From: Intel-wired-lan [mailto:intel-wired-lan-bounces at lists.osuosl.org] On Behalf Of Jacob Keller
Sent: Friday, October 16, 2015 10:57 AM
To: Intel Wired LAN <intel-wired-lan at lists.osuosl.org>
Subject: [Intel-wired-lan] [next-queue v5 11/17] fm10k: Add support for ITR scaling based on PCIe link speed

The Intel Ethernet Switch FM10000 Host Interface interrupt throttle timers are based on the PCIe link speed. Because of this, the value being programmed into the ITR registers must be scaled accordingly.

For the PF, this is as simple as reading the PCIe link speed and storing the result. However, in the case of SR-IOV, the VF's interrupt throttle timers are based on the link speed of the PF. However, the VF is unable to get the link speed information from its configuration space, so the PF must inform it of what scale to use.

Rather than pass this scale via mailbox message, take advantage of unused bits in the TDLEN register to pass the scale. It is the responsibility of the PF to program this for the VF while setting up the VF queues and the responsibility of the VF to get the information accordingly. This is preferable because it allows the VF to set up the interrupts properly during initialization and matches how the MAC address is passed in the TDBAL/TDBAH registers.

Since we're modifying fm10k_type.h, we may as well also update the copyright year.

Reported-by: Matthew Vick <matthew.vick at intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller at intel.com>
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Tested-by: Krishneil Singh <krishneil.k.singh at intel.com>