[Intel-wired-lan] Bug with 'igb: Remove GS40G specific defines/functions'
Chris Arges
carges at vectranetworks.com
Thu Oct 27 01:44:30 UTC 2016
Jochen,
Not sure if you had time to look at this, do you thing the patch I sent previously is on the right path?
I'm happy to submit a formal patch to the list.
Thanks,
--chris
________________________________
From: Chris Arges
Sent: Monday, October 17, 2016 1:36:38 PM
To: Jochen Henneberg
Cc: Aaron Sierra; intel-wired-lan
Subject: Re: [Intel-wired-lan] Bug with 'igb: Remove GS40G specific defines/functions'
On 10/14/16, 6:24 AM, "Jochen Henneberg" <jh at henneberg-systemdesign.com> wrote:
On Do, 2016-10-13 at 13:56 +0000, Chris Arges wrote:
> Jochen,
>
> Thanks for this update. I tested this patch and it fixes my issue!
> If there are no other ill effects from this patch perhaps it would be
> a good
> candidate for mainline and stable.
The patch is hacky, it does neither use the phy-ops.write_reg() nor does
it check for the correct chip before it applies the write.
I will try to prepare a clean fix and send a patch.
Regards
-Jochen
What about something as follows? This fixes the issue for me.
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 5b54254..6d42dfe 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -77,6 +77,10 @@ s32 igb_get_phy_id(struct e1000_hw *hw)
s32 ret_val = 0;
u16 phy_id;
+ /* ensure phy page selection to fix misconfigured i210 */
+ if (hw->mac.type == e1000_i210)
+ phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0);
+
ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
if (ret_val)
goto out;
>
> --chris
--
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Jochen Henneberg
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