[Intel-wired-lan] i350 software defined pins sysfs access

[Max Lapshin]

> 
> The igb driver already uses these pins for PTP if that's configured and
> the 82575 uses SDP3 as a power enable for SFP cages, sgmii PHYs, etc.
> You'll need to avoid letting userspace poke at SDPs that the driver is
> already using.

I should write code to avoid touching these registers for these cases?

> 
> Assuming this can coexist with the existing usage, why not register this
> as a gpio_chip with the gpiolib framework?

Ok, I will  take a look at it.


> 
>> Subject: [PATCH] i350: Add support for Intel i350 software defined pins
>> 
>> +
>> +/* Software defined pins 2-3 */
>> +#define IGB_CTRL_EXT_SDP2_DATA E1000_CTRL_EXT_SDP2_DATA /* Value of SW Defineable Pin 2 */
>> +#define IGB_CTRL_EXT_SDP3_DATA E1000_CTRL_EXT_SDP3_DATA /* Value of SW Defineable Pin 3 */
>> +#define IGB_CTRL_EXT_SDP2_DIR  E1000_CTRL_EXT_SDP2_DIR  /* SDP2 Data direction */
>> +#define IGB_CTRL_EXT_SDP3_DIR  E1000_CTRL_EXT_SDP3_DIR  /* SDP3 Data direction */
> 
> Looks like e1000_defines.h already has this info.
> 

Only partially, so I decided to copy it to avoid situtation then I have in one code  IGB_ and E1000_  defines.

It is not good?
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