From konrad0.jankowski at intel.com Mon Nov 1 10:20:47 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Mon, 1 Nov 2021 10:20:47 +0000 Subject: [Intel-wired-lan] [PATCH net v2] ice: Fix not stopping Tx queues for VFs In-Reply-To: <20210909213809.27461-1-brett.creeley@intel.com> References: <20210909213809.27461-1-brett.creeley@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Brett Creeley > Sent: czwartek, 9 wrze?nia 2021 23:38 > To: intel-wired-lan at lists.osuosl.org > Cc: Patynowski, PrzemyslawX > Subject: [Intel-wired-lan] [PATCH net v2] ice: Fix not stopping Tx queues for > VFs > > When a VF is removed and/or reset its Tx queues need to be stopped from > the PF. This is done by calling the ice_dis_vf_qs() function, which calls > ice_vsi_stop_lan_tx_rings(). Currently > ice_dis_vf_qs() is protected by the VF state bit ICE_VF_STATE_QS_ENA. > Unfortunately, this is causing the Tx queues to not be disabled in some cases > and when the VF tries to re-enable/reconfigure its Tx queues over virtchnl > the op is failing. This is because a VF can be reset and/or removed before the > ICE_VF_STATE_QS_ENA bit is set, but the Tx queues were already configured > via ice_vsi_cfg_single_txq() in the VIRTCHNL_OP_CONFIG_VSI_QUEUES op. > However, the ICE_VF_STATE_QS_ENA bit is set on a successful > VIRTCHNL_OP_ENABLE_QUEUES, which will always happen after the > VIRTCHNL_OP_CONFIG_VSI_QUEUES op. > > This was causing the following error message when loading the ice driver, > creating VFs, and modifying VF trust in an endless loop: > > [35274.192484] ice 0000:88:00.0: Failed to set LAN Tx queue context, error: > ICE_ERR_PARAM [35274.193074] ice 0000:88:00.0: VF 0 failed opcode 6, > retval: -5 [35274.193640] iavf 0000:88:01.0: PF returned error -5 > (IAVF_ERR_PARAM) to our request 6 > > Fix this by always calling ice_dis_vf_qs() and silencing the error message in > ice_vsi_stop_tx_ring() since the calling code ignores the return anyway. Also, > all other places that call ice_vsi_stop_tx_ring() catch the error, so this doesn't > affect those flows since there was no change to the values the function > returns. > > Other solutions were considered (i.e. tracking which VF queues had been > "started/configured" in VIRTCHNL_OP_CONFIG_VSI_QUEUES, but it seemed > more complicated than it was worth. This solution also brings in the chance > for other unexpected conditions due to invalid state bit checks. > So, the proposed solution seemed like the best option since there is no harm > in failing to stop Tx queues that were never started. > > This issue can be seen using the following commands: > > for i in {0..50}; do > rmmod ice > modprobe ice > > sleep 1 > > echo 1 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 1 > /sys/class/net/ens785f1/device/sriov_numvfs > > ip link set ens785f1 vf 0 trust on > ip link set ens785f0 vf 0 trust on > > sleep 2 > > echo 0 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 0 > /sys/class/net/ens785f1/device/sriov_numvfs > sleep 1 > echo 1 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 1 > /sys/class/net/ens785f1/device/sriov_numvfs > > ip link set ens785f1 vf 0 trust on > ip link set ens785f0 vf 0 trust on done > > Fixes: 77ca27c41705 ("ice: add support for > virtchnl_queue_select.[tx|rx]_queues bitmap") > Signed-off-by: Brett Creeley > --- > v2: Update Fixes tag > > drivers/net/ethernet/intel/ice/ice_base.c | 2 +- > drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c | 6 ++---- > 2 files changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/ethernet/intel/ice/ice_base.c > b/drivers/net/ethernet/intel/ice/ice_base.c > index c36057efc7ae..f74610442bda 100644 > --- a/drivers/net/ethernet/intel/ice/ice_base.c > +++ b/drivers/net/ethernet/intel/ice/ice_base.c Tested-by: Konrad Jankowski From konrad0.jankowski at intel.com Mon Nov 1 10:22:00 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Mon, 1 Nov 2021 10:22:00 +0000 Subject: [Intel-wired-lan] [PATCH net v2] ice: Fix race conditions between virtchnl handling and VF ndo ops In-Reply-To: <20210909213809.27461-2-brett.creeley@intel.com> References: <20210909213809.27461-1-brett.creeley@intel.com> <20210909213809.27461-2-brett.creeley@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Brett Creeley > Sent: czwartek, 9 wrze?nia 2021 23:38 > To: intel-wired-lan at lists.osuosl.org > Cc: Patynowski, PrzemyslawX > Subject: [Intel-wired-lan] [PATCH net v2] ice: Fix race conditions between > virtchnl handling and VF ndo ops > > The VF can be configured via the PF's ndo ops at the same time the PF is > receiving/handling virtchnl messages. This has many issues, with one of them > being the ndo op could be actively resetting a VF (i.e. > resetting it to the default state and deleting/re-adding the VF's VSI) while a > virtchnl message is being handled. The following error was seen because a VF > ndo op was used to change a VF's trust setting while the > VIRTCHNL_OP_CONFIG_VSI_QUEUES was ongoing: > > [35274.192484] ice 0000:88:00.0: Failed to set LAN Tx queue context, error: > ICE_ERR_PARAM [35274.193074] ice 0000:88:00.0: VF 0 failed opcode 6, > retval: -5 [35274.193640] iavf 0000:88:01.0: PF returned error -5 > (IAVF_ERR_PARAM) to our request 6 > > Fix this by making sure the virtchnl handling and VF ndo ops that trigger VF > resets cannot run concurrently. This is done by adding a struct mutex > cfg_lock to each VF structure. For VF ndo ops, the mutex will be locked > around the critical operations and VFR. Since the ndo ops will trigger a VFR, > the virtchnl thread will use mutex_trylock(). This is done because if any other > thread (i.e. VF ndo op) has the mutex, then that means the current VF > message being handled is no longer valid, so just ignore it. > > This issue can be seen using the following commands: > > for i in {0..50}; do > rmmod ice > modprobe ice > > sleep 1 > > echo 1 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 1 > /sys/class/net/ens785f1/device/sriov_numvfs > > ip link set ens785f1 vf 0 trust on > ip link set ens785f0 vf 0 trust on > > sleep 2 > > echo 0 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 0 > /sys/class/net/ens785f1/device/sriov_numvfs > sleep 1 > echo 1 > /sys/class/net/ens785f0/device/sriov_numvfs > echo 1 > /sys/class/net/ens785f1/device/sriov_numvfs > > ip link set ens785f1 vf 0 trust on > ip link set ens785f0 vf 0 trust on done > > Fixes: 7c710869d64e ("ice: Add handlers for VF netdevice operations") > Signed-off-by: Brett Creeley > --- > v2: Update Fixes tag > > .../net/ethernet/intel/ice/ice_virtchnl_pf.c | 25 +++++++++++++++++++ > .../net/ethernet/intel/ice/ice_virtchnl_pf.h | 5 ++++ > 2 files changed, 30 insertions(+) > > diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c > b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c > index e93430ab37f1..bf6bffbc2173 100644 > --- a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c > +++ b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c > @@ -647,6 +647,8 @@ void ice_free_vfs(struct ice_pf *pf) Tested-by: Konrad Jankowski From lkp at intel.com Mon Nov 1 07:23:14 2021 From: lkp at intel.com (kernel test robot) Date: Mon, 1 Nov 2021 15:23:14 +0800 Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix handling of vlan strip virtual channel messages In-Reply-To: <20211028104114.71879-1-michal.maloszewski@intel.com> References: <20211028104114.71879-1-michal.maloszewski@intel.com> Message-ID: <202111011533.xMiDQuxH-lkp@intel.com> Hi Michal, Thank you for the patch! Yet something to improve: [auto build test ERROR on tnguy-next-queue/dev-queue] [also build test ERROR on v5.15 next-20211029] [cannot apply to net/master] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Michal-Maloszewski/iavf-Fix-handling-of-vlan-strip-virtual-channel-messages/20211028-190947 base: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue config: s390-allyesconfig (attached as .config) compiler: s390-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/a899b5944ecc501aa3c6075c2edfe0ec702802f7 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Michal-Maloszewski/iavf-Fix-handling-of-vlan-strip-virtual-channel-messages/20211028-190947 git checkout a899b5944ecc501aa3c6075c2edfe0ec702802f7 # save the attached .config to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=s390 SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): drivers/net/ethernet/intel/iavf/iavf_virtchnl.c: In function 'iavf_netdev_features_vlan_strip_set': >> drivers/net/ethernet/intel/iavf/iavf_virtchnl.c:1471:51: error: 'NETIF_F_HW_VLAN_RX' undeclared (first use in this function); did you mean 'NETIF_F_HW_TLS_RX'? 1471 | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_RX; | ^~~~~~~~~~~~~~~~~~ | NETIF_F_HW_TLS_RX drivers/net/ethernet/intel/iavf/iavf_virtchnl.c:1471:51: note: each undeclared identifier is reported only once for each function it appears in vim +1471 drivers/net/ethernet/intel/iavf/iavf_virtchnl.c 1458 1459 /** 1460 * iavf_netdev_features_vlan_strip_set - update vlan strip status 1461 * @netdev: ptr to netdev being adjusted 1462 * @enable: enable or disable vlan strip 1463 * 1464 * Helper function to change vlan strip status in netdev->features. 1465 */ 1466 static void iavf_netdev_features_vlan_strip_set(struct net_device *netdev, 1467 const bool enable) 1468 { 1469 if (enable) 1470 netdev->features |= > 1471 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_RX; 1472 else 1473 netdev->features &= 1474 ~NETIF_F_HW_VLAN_CTAG_RX & ~NETIF_F_HW_VLAN_RX; 1475 } 1476 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org -------------- next part -------------- A non-text attachment was scrubbed... Name: .config.gz Type: application/gzip Size: 67922 bytes Desc: not available URL: From csander at purestorage.com Mon Nov 1 17:38:08 2021 From: csander at purestorage.com (Caleb Sander) Date: Mon, 1 Nov 2021 11:38:08 -0600 Subject: [Intel-wired-lan] [PATCH v2] i40e: avoid spin loop in i40e_asq_send_command() In-Reply-To: References: Message-ID: <20211101173808.1735144-1-csander@purestorage.com> Previously, the kernel could spend up to 250 ms waiting for a command to be submitted to an admin queue. This function is also called in a loop, e.g., in i40e_get_module_eeprom() (through i40e_aq_get_phy_register()), so the time spent in the kernel may be even higher. We observed scheduling delays of over 2 seconds in production, with stacktraces pointing to this code as the culprit. Use usleep_range() instead of udelay() so the loop can yield the CPU. Also compute the elapsed time using the jiffies counter rather than assuming udelay() waits exactly the time interval requested. Signed-off-by: Caleb Sander Reviewed-by: Joern Engel --- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) Changed from v1: Use usleep_range() instead of udelay() + cond_resched(), to avoid using the CPU while waiting. Use 50 us as the max for the range since hrtimers schedules the sleep for the max (unless another timer interrupt occurs after the min). Since checking if the command is done too frequently would waste time context-switching, use half of the max (25 us) as the min for the range. diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c index 593912b17..b2c27ab3b 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c @@ -902,7 +902,7 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, * we need to wait for desc write back */ if (!details->async && !details->postpone) { - u32 total_delay = 0; + unsigned long timeout_end = jiffies + usecs_to_jiffies(hw->aq.asq_cmd_timeout); do { /* AQ designers suggest use of head for better @@ -910,9 +910,8 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, */ if (i40e_asq_done(hw)) break; - udelay(50); - total_delay += 50; - } while (total_delay < hw->aq.asq_cmd_timeout); + usleep_range(25, 50); + } while (time_before(jiffies, timeout_end)); } /* if ready, copy the desc back to temp */ -- 2.25.1 From tony.brelinski at intel.com Mon Nov 1 23:01:54 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:01:54 +0000 Subject: [Intel-wired-lan] [PATCH net 8/8] iavf: Fix for setting queues to 0 In-Reply-To: <20210604164900.33156-8-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-8-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 8/8] iavf: Fix for setting queues to 0 > > From: Grzegorz Szczurek > > Now setting combine to 0 will be rejected with the appropriate error code. > This has been implemented by adding a condition that checks the value of > combine equal to zero. > Without this patch, when the user requested it, no error was returned and > combine was set to the default value for VF. > > Fixes: 5520deb15326 ("iavf: Enable support for up to 16 queues") > Signed-off-by: Grzegorz Szczurek > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:02:32 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:02:32 +0000 Subject: [Intel-wired-lan] [PATCH net 6/8] iavf: validate pointers In-Reply-To: <20210604164900.33156-6-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-6-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 6/8] iavf: validate pointers > > From: Mitch Williams > > In some cases, the ethtool get_rxfh handler may be called with a null key or > indir parameter. So check these pointers, or you will have a very bad day. > > Fixes: 43a3d9ba34c9 ("i40evf: Allow PF driver to configure RSS") > Signed-off-by: Mitch Williams > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 13 ++++++------- > 1 file changed, 6 insertions(+), 7 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:02:59 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:02:59 +0000 Subject: [Intel-wired-lan] [PATCH net 5/8] iavf: prevent accidental free of filter structure In-Reply-To: <20210604164900.33156-5-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-5-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 5/8] iavf: prevent accidental free of > filter structure > > From: Jacob Keller > > In iavf_config_clsflower, the filter structure could be accidentally released at > the end, if iavf_parse_cls_flower or iavf_handle_tclass ever return a non- > zero but positive value. > > In this case, the function continues through to the end, and will call > kfree() on the filter structure even though it has been added to the linked > list. > > This can actually happen because iavf_parse_cls_flower will return a positive > IAVF_ERR_CONFIG value instead of the traditional negative error codes. > > Fix this by ensuring that the kfree() check and error checks are similar. Use > the more idiomatic "if (err)" to catch all non-zero error codes. > > Fixes: 0075fa0fadd0 ("i40evf: Add support to apply cloud filters") > Signed-off-by: Jacob Keller > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:03:33 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:03:33 +0000 Subject: [Intel-wired-lan] [PATCH net 4/8] iavf: Fix failure to exit out from last all-multicast mode In-Reply-To: <20210604164900.33156-4-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-4-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 4/8] iavf: Fix failure to exit out from last > all-multicast mode > > From: Piotr Marczak > > The driver could only quit allmulti when allmulti and promisc modes are turn > on at the same time. If promisc had been off there was no way to turn off > allmulti mode. > The patch corrects this behavior. Switching allmulti does not depends on > promisc state mode anymore > > Fixes: f42a5c74da99 ("i40e: Add allmulti support for the VF") > Signed-off-by: Piotr Marczak > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:03:55 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:03:55 +0000 Subject: [Intel-wired-lan] [PATCH net 3/8] iavf: don't clear a lock we don't hold In-Reply-To: <20210604164900.33156-3-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-3-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 3/8] iavf: don't clear a lock we don't > hold > > From: Nicholas Nunley > > In iavf_configure_clsflower() the function will bail out if it is unable to obtain > the crit_section lock in a reasonable time. However, it will clear the lock when > exiting, so fix this. > > Fixes: 640a8af5841f ("i40evf: Reorder configure_clsflower to avoid deadlock > on error") > Signed-off-by: Nicholas Nunley > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:04:22 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:04:22 +0000 Subject: [Intel-wired-lan] [PATCH net 2/8] iavf: free q_vectors before queues in iavf_disable_vf In-Reply-To: <20210604164900.33156-2-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-2-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 2/8] iavf: free q_vectors before > queues in iavf_disable_vf > > From: Nicholas Nunley > > iavf_free_queues() clears adapter->num_active_queues, which > iavf_free_q_vectors() relies on, so swap the order of these two function calls > in iavf_disable_vf(). This resolves a panic encountered when the interface is > disabled and then later brought up again after PF communication is restored. > > Fixes: 65c7006f234c ("i40evf: assign num_active_queues inside > i40evf_alloc_queues") > Signed-off-by: Nicholas Nunley > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:04:44 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:04:44 +0000 Subject: [Intel-wired-lan] [PATCH net 1/8] iavf: check for null in iavf_fix_features In-Reply-To: <20210604164900.33156-1-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 1/8] iavf: check for null in > iavf_fix_features > > From: Nicholas Nunley > > If the driver has lost contact with the PF then it enters a disabled state and > frees adapter->vf_res. However, ndo_fix_features can still be called on the > interface, so we need to check for this condition first. Since we have no > information on the features at this time simply leave them unmodified and > return. > > Fixes: c4445aedfe09 ("i40evf: Fix VLAN features") > Signed-off-by: Nicholas Nunley > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Mon Nov 1 23:05:10 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Mon, 1 Nov 2021 23:05:10 +0000 Subject: [Intel-wired-lan] [PATCH net 7/8] iavf: Fix for the false positive ASQ/ARQ errors while issuing VF reset In-Reply-To: <20210604164900.33156-7-anthony.l.nguyen@intel.com> References: <20210604164900.33156-1-anthony.l.nguyen@intel.com> <20210604164900.33156-7-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:49 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net 7/8] iavf: Fix for the false positive > ASQ/ARQ errors while issuing VF reset > > From: Surabhi Boob > > While issuing VF Reset from the guest OS, the VF driver prints logs about > critical / Overflow error detection. This is not an actual error since the > VF_MBX_ARQLEN register is set to all FF's for a short period of time and the > VF would catch the bits set if it was reading the register during that spike of > time. > This patch introduces an additional check to ignore this condition since the VF > is in reset. > > Fixes: 19b73d8efaa4 ("i40evf: Add additional check for reset") > Signed-off-by: Surabhi Boob > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Tony Brelinski From george.kuruvinakunnel at intel.com Tue Nov 2 00:21:40 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Tue, 2 Nov 2021 00:21:40 +0000 Subject: [Intel-wired-lan] [PATCH net-next 11/15] iavf: Prevent changing static ITR values if adaptive moderation is on In-Reply-To: <20210604165335.33329-11-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-11-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:54 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 11/15] iavf: Prevent changing static > ITR values if adaptive moderation is on > > From: Nitesh B Venkatesh > > Resolve being able to change static values on VF when adaptive interrupt > moderation is enabled. > > This problem is fixed by checking the interrupt settings is not a combination of > change of static value while adaptive interrupt moderation is turned on. > > Without this fix, the user would be able to change static values on VF with > adaptive moderation enabled. > > Signed-off-by: Nitesh B Venkatesh > Signed-off-by: Tony Nguyen > --- > .../net/ethernet/intel/iavf/iavf_ethtool.c | 30 ++++++++++++++++--- > 1 file changed, 26 insertions(+), 4 deletions(-) Tested-by: George Kuruvinakunnel From george.kuruvinakunnel at intel.com Tue Nov 2 00:34:54 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Tue, 2 Nov 2021 00:34:54 +0000 Subject: [Intel-wired-lan] [PATCH net-next 10/15] iavf: Add change MTU message In-Reply-To: <20210604165335.33329-10-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-10-anthony.l.nguyen@intel.com> Message-ID: > From: Intel-wired-lan On Behalf Of Nguyen, > Anthony L > Sent: Friday, June 4, 2021 9:54 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 10/15] iavf: Add change MTU message > > From: Patryk Ma?ek > > Add a netdev_info log entry in case of a change of MTU so that user is notified > about this change in the same manner as in case of pf driver. > > Signed-off-by: Patryk Ma?ek > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 2 ++ > 1 file changed, 2 insertions(+) > Tested-by: George Kuruvinakunnel From george.kuruvinakunnel at intel.com Tue Nov 2 00:47:00 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Tue, 2 Nov 2021 00:47:00 +0000 Subject: [Intel-wired-lan] [PATCH net-next 12/15] iavf: Log info when VF is entering and leaving Allmulti mode In-Reply-To: <20210604165335.33329-12-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-12-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Nguyen, > Anthony L > Sent: Friday, June 4, 2021 9:54 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 12/15] iavf: Log info when VF is entering > and leaving Allmulti mode > > From: Grzegorz Szczurek > > Add log when VF is entering and leaving Allmulti mode. > The change of VF state is visible in dmesg now. > Without this commit, entering and leaving Allmulti mode is not logged in dmesg. > > Signed-off-by: Grzegorz Szczurek > Signed-off-by: Tony Nguyen > --- > .../net/ethernet/intel/iavf/iavf_virtchnl.c | 20 +++++++++++++------ > 1 file changed, 14 insertions(+), 6 deletions(-) > Tested-by: George Kuruvinakunnel From kai.heng.feng at canonical.com Tue Nov 2 03:27:59 2021 From: kai.heng.feng at canonical.com (Kai-Heng Feng) Date: Tue, 2 Nov 2021 11:27:59 +0800 Subject: [Intel-wired-lan] [PATCH v2] e1000e: Add a delay to let ME unconfigure s0ix when DPG_EXIT_DONE is already flagged In-Reply-To: References: <20211026065112.1366205-1-kai.heng.feng@canonical.com> <04ed8307-ab1f-59d6-4454-c759ce4a453b@intel.com> Message-ID: On Fri, Oct 29, 2021 at 5:14 PM Sasha Neftin wrote: > > On 10/27/2021 01:50, Kai-Heng Feng wrote: > > On Tue, Oct 26, 2021 at 4:48 PM Sasha Neftin wrote: > >> > >> On 10/26/2021 09:51, Kai-Heng Feng wrote: > >>> On some ADL platforms, DPG_EXIT_DONE is always flagged so e1000e resume > >>> polling logic doesn't wait until ME really unconfigures s0ix. > >>> > >>> So check DPG_EXIT_DONE before issuing EXIT_DPG, and if it's already > >>> flagged, wait for 1 second to let ME unconfigure s0ix. > >>> > >>> Fixes: 3e55d231716e ("e1000e: Add handshake with the CSME to support S0ix") > >>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=214821 > >>> Signed-off-by: Kai-Heng Feng > >>> --- > >>> v2: > >>> Add missing "Fixes:" tag > >>> > >>> drivers/net/ethernet/intel/e1000e/netdev.c | 7 +++++++ > >>> 1 file changed, 7 insertions(+) > >>> > >>> diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c > >>> index 44e2dc8328a22..cd81ba00a6bc9 100644 > >>> --- a/drivers/net/ethernet/intel/e1000e/netdev.c > >>> +++ b/drivers/net/ethernet/intel/e1000e/netdev.c > >>> @@ -6493,14 +6493,21 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) > >>> u32 mac_data; > >>> u16 phy_data; > >>> u32 i = 0; > >>> + bool dpg_exit_done; > >>> > >>> if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) { > >>> + dpg_exit_done = er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE; > >>> /* Request ME unconfigure the device from S0ix */ > >>> mac_data = er32(H2ME); > >>> mac_data &= ~E1000_H2ME_START_DPG; > >>> mac_data |= E1000_H2ME_EXIT_DPG; > >>> ew32(H2ME, mac_data); > >>> > >>> + if (dpg_exit_done) { > >>> + e_warn("DPG_EXIT_DONE is already flagged. This is a firmware bug\n"); > >>> + msleep(1000); > >>> + } > >> Thanks for working on the enablement. > >> The delay approach is fragile. We need to work with CSME folks to > >> understand why _DPG_EXIT_DONE indication is wrong on some ADL platforms. > >> Could you provide CSME/BIOS version? dmidecode -t 0 and cat > >> /sys/class/mei/mei0/fw_ver > > > > $ sudo dmidecode -t 0 > > # dmidecode 3.2 > > Getting SMBIOS data from sysfs. > > SMBIOS 3.4 present. > > # SMBIOS implementations newer than version 3.2.0 are not > > # fully supported by this version of dmidecode. > > > > Handle 0x0001, DMI type 0, 26 bytes > > BIOS Information > > Vendor: Dell Inc. > > Version: 0.12.68 > > Release Date: 10/01/2021 > > ROM Size: 48 MB > > Characteristics: > > PCI is supported > > PNP is supported > > BIOS is upgradeable > > BIOS shadowing is allowed > > Boot from CD is supported > > Selectable boot is supported > > EDD is supported > > Print screen service is supported (int 5h) > > 8042 keyboard services are supported (int 9h) > > Serial services are supported (int 14h) > > Printer services are supported (int 17h) > > ACPI is supported > > USB legacy is supported > > BIOS boot specification is supported > > Function key-initiated network boot is supported > > Targeted content distribution is supported > > UEFI is supported > > BIOS Revision: 0.12 > > > > $ cat /sys/class/mei/mei0/fw_ver > > 0:16.0.15.1518 > > 0:16.0.15.1518 > > 0:16.0.15.1518 > > > Thank you Kai-Heng. The _DPG_EXIT_DONE bit indication comes from the > EXFWSM register controlled by the CSME. We have only read access. I > realized that this indication was set to 1 even before our request to > unconfigure the s0ix settings from the CSME. I am wondering. Does after > a ~ 1s delay (or less, or more) _DPG_EXIT_DONE indication eventually > change by CSME to 0? (is it consistently) Never. It's consistently being 1. Right now we are seeing the same issue on TGL, so I wonder if it's better to just revert the CSME series? Kai-Heng > >>> /* Poll up to 2.5 seconds for ME to unconfigure DPG. > >>> * If this takes more than 1 second, show a warning indicating a > >>> * firmware bug > >>> > From lkp at intel.com Tue Nov 2 05:07:03 2021 From: lkp at intel.com (kernel test robot) Date: Tue, 02 Nov 2021 13:07:03 +0800 Subject: [Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS 9821c1edc670b21c84c5d99e7ee4239771dee596 Message-ID: <6180c777.+qnBDvmlx59ee1IW%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue branch HEAD: 9821c1edc670b21c84c5d99e7ee4239771dee596 i40e: Fix display error code in dmesg elapsed time: 851m configs tested: 103 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig i386 allyesconfig sh se7712_defconfig arm netwinder_defconfig sh sh7785lcr_32bit_defconfig mips sb1250_swarm_defconfig arc vdk_hs38_defconfig powerpc mpc8272_ads_defconfig mips xway_defconfig m68k allmodconfig sh apsh4ad0a_defconfig xtensa audio_kc705_defconfig m68k q40_defconfig arm aspeed_g5_defconfig sh titan_defconfig mips capcella_defconfig powerpc tqm8548_defconfig sh se7705_defconfig powerpc tqm8xx_defconfig m68k m5475evb_defconfig powerpc cm5200_defconfig arm mvebu_v5_defconfig microblaze mmu_defconfig arm randconfig-c002-20211101 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k allyesconfig m68k defconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig h8300 allyesconfig arc defconfig sh allmodconfig xtensa allyesconfig parisc defconfig s390 defconfig s390 allyesconfig s390 allmodconfig parisc allyesconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 arc allyesconfig nios2 defconfig nds32 allnoconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a012-20211101 x86_64 randconfig-a015-20211101 x86_64 randconfig-a016-20211101 x86_64 randconfig-a013-20211101 x86_64 randconfig-a011-20211101 x86_64 randconfig-a014-20211101 i386 randconfig-a016-20211101 i386 randconfig-a014-20211101 i386 randconfig-a015-20211101 i386 randconfig-a013-20211101 i386 randconfig-a011-20211101 i386 randconfig-a012-20211101 arc randconfig-r043-20211101 riscv randconfig-r042-20211101 s390 randconfig-r044-20211101 riscv nommu_k210_defconfig riscv nommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscv allyesconfig riscv allmodconfig um x86_64_defconfig um i386_defconfig x86_64 rhel-8.3-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 allyesconfig clang tested configs: x86_64 randconfig-a004-20211101 x86_64 randconfig-a006-20211101 x86_64 randconfig-a001-20211101 x86_64 randconfig-a002-20211101 x86_64 randconfig-a003-20211101 x86_64 randconfig-a005-20211101 i386 randconfig-a005-20211101 i386 randconfig-a001-20211101 i386 randconfig-a003-20211101 i386 randconfig-a004-20211101 i386 randconfig-a006-20211101 i386 randconfig-a002-20211101 hexagon randconfig-r041-20211101 hexagon randconfig-r045-20211101 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From lkp at intel.com Tue Nov 2 05:30:26 2021 From: lkp at intel.com (kernel test robot) Date: Tue, 02 Nov 2021 13:30:26 +0800 Subject: [Intel-wired-lan] [tnguy-net-queue:100GbE] BUILD SUCCESS fd8f3f49ed362ba38986f9fe1b6eb5bcd40ebc75 Message-ID: <6180ccf2.jqMDjtkZmMedS7Q/%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git 100GbE branch HEAD: fd8f3f49ed362ba38986f9fe1b6eb5bcd40ebc75 ice: Fix race conditions between virtchnl handling and VF ndo ops elapsed time: 720m configs tested: 100 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig powerpc powernv_defconfig arm shmobile_defconfig mips ar7_defconfig powerpc currituck_defconfig powerpc pq2fads_defconfig mips cu1000-neo_defconfig arm palmz72_defconfig mips ip32_defconfig s390 debug_defconfig powerpc mpc834x_itx_defconfig powerpc acadia_defconfig arm h5000_defconfig arc alldefconfig sh hp6xx_defconfig sh se7705_defconfig powerpc tqm8xx_defconfig m68k m5475evb_defconfig powerpc cm5200_defconfig arm mvebu_v5_defconfig microblaze mmu_defconfig arm randconfig-c002-20211101 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k allmodconfig m68k defconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig h8300 allyesconfig arc defconfig sh allmodconfig xtensa allyesconfig parisc defconfig s390 allyesconfig s390 allmodconfig parisc allyesconfig s390 defconfig i386 allyesconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a012-20211101 x86_64 randconfig-a015-20211101 x86_64 randconfig-a016-20211101 x86_64 randconfig-a013-20211101 x86_64 randconfig-a011-20211101 x86_64 randconfig-a014-20211101 i386 randconfig-a016-20211101 i386 randconfig-a014-20211101 i386 randconfig-a015-20211101 i386 randconfig-a013-20211101 i386 randconfig-a011-20211101 i386 randconfig-a012-20211101 riscv allyesconfig riscv allmodconfig riscv nommu_k210_defconfig riscv nommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig um x86_64_defconfig um i386_defconfig x86_64 allyesconfig x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 rhel-8.3-kselftests clang tested configs: x86_64 randconfig-a004-20211101 x86_64 randconfig-a006-20211101 x86_64 randconfig-a001-20211101 x86_64 randconfig-a002-20211101 x86_64 randconfig-a003-20211101 x86_64 randconfig-a005-20211101 i386 randconfig-a005-20211101 i386 randconfig-a001-20211101 i386 randconfig-a003-20211101 i386 randconfig-a004-20211101 i386 randconfig-a006-20211101 i386 randconfig-a002-20211101 hexagon randconfig-r041-20211101 hexagon randconfig-r045-20211101 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From sasha.neftin at intel.com Tue Nov 2 06:24:08 2021 From: sasha.neftin at intel.com (Sasha Neftin) Date: Tue, 2 Nov 2021 08:24:08 +0200 Subject: [Intel-wired-lan] [PATCH v2] e1000e: Add a delay to let ME unconfigure s0ix when DPG_EXIT_DONE is already flagged In-Reply-To: References: <20211026065112.1366205-1-kai.heng.feng@canonical.com> <04ed8307-ab1f-59d6-4454-c759ce4a453b@intel.com> Message-ID: <49c5e91a-8e02-2a76-db5d-5f15df3c485f@intel.com> On 11/2/2021 05:27, Kai-Heng Feng wrote: > On Fri, Oct 29, 2021 at 5:14 PM Sasha Neftin wrote: >> >> On 10/27/2021 01:50, Kai-Heng Feng wrote: >>> On Tue, Oct 26, 2021 at 4:48 PM Sasha Neftin wrote: >>>> >>>> On 10/26/2021 09:51, Kai-Heng Feng wrote: >>>>> On some ADL platforms, DPG_EXIT_DONE is always flagged so e1000e resume >>>>> polling logic doesn't wait until ME really unconfigures s0ix. >>>>> >>>>> So check DPG_EXIT_DONE before issuing EXIT_DPG, and if it's already >>>>> flagged, wait for 1 second to let ME unconfigure s0ix. >>>>> >>>>> Fixes: 3e55d231716e ("e1000e: Add handshake with the CSME to support S0ix") >>>>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=214821 >>>>> Signed-off-by: Kai-Heng Feng >>>>> --- >>>>> v2: >>>>> Add missing "Fixes:" tag >>>>> >>>>> drivers/net/ethernet/intel/e1000e/netdev.c | 7 +++++++ >>>>> 1 file changed, 7 insertions(+) >>>>> >>>>> diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c >>>>> index 44e2dc8328a22..cd81ba00a6bc9 100644 >>>>> --- a/drivers/net/ethernet/intel/e1000e/netdev.c >>>>> +++ b/drivers/net/ethernet/intel/e1000e/netdev.c >>>>> @@ -6493,14 +6493,21 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) >>>>> u32 mac_data; >>>>> u16 phy_data; >>>>> u32 i = 0; >>>>> + bool dpg_exit_done; >>>>> >>>>> if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) { >>>>> + dpg_exit_done = er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE; >>>>> /* Request ME unconfigure the device from S0ix */ >>>>> mac_data = er32(H2ME); >>>>> mac_data &= ~E1000_H2ME_START_DPG; >>>>> mac_data |= E1000_H2ME_EXIT_DPG; >>>>> ew32(H2ME, mac_data); >>>>> >>>>> + if (dpg_exit_done) { >>>>> + e_warn("DPG_EXIT_DONE is already flagged. This is a firmware bug\n"); >>>>> + msleep(1000); >>>>> + } >>>> Thanks for working on the enablement. >>>> The delay approach is fragile. We need to work with CSME folks to >>>> understand why _DPG_EXIT_DONE indication is wrong on some ADL platforms. >>>> Could you provide CSME/BIOS version? dmidecode -t 0 and cat >>>> /sys/class/mei/mei0/fw_ver >>> >>> $ sudo dmidecode -t 0 >>> # dmidecode 3.2 >>> Getting SMBIOS data from sysfs. >>> SMBIOS 3.4 present. >>> # SMBIOS implementations newer than version 3.2.0 are not >>> # fully supported by this version of dmidecode. >>> >>> Handle 0x0001, DMI type 0, 26 bytes >>> BIOS Information >>> Vendor: Dell Inc. >>> Version: 0.12.68 >>> Release Date: 10/01/2021 >>> ROM Size: 48 MB >>> Characteristics: >>> PCI is supported >>> PNP is supported >>> BIOS is upgradeable >>> BIOS shadowing is allowed >>> Boot from CD is supported >>> Selectable boot is supported >>> EDD is supported >>> Print screen service is supported (int 5h) >>> 8042 keyboard services are supported (int 9h) >>> Serial services are supported (int 14h) >>> Printer services are supported (int 17h) >>> ACPI is supported >>> USB legacy is supported >>> BIOS boot specification is supported >>> Function key-initiated network boot is supported >>> Targeted content distribution is supported >>> UEFI is supported >>> BIOS Revision: 0.12 >>> >>> $ cat /sys/class/mei/mei0/fw_ver >>> 0:16.0.15.1518 >>> 0:16.0.15.1518 >>> 0:16.0.15.1518 >>> >> Thank you Kai-Heng. The _DPG_EXIT_DONE bit indication comes from the >> EXFWSM register controlled by the CSME. We have only read access. I >> realized that this indication was set to 1 even before our request to >> unconfigure the s0ix settings from the CSME. I am wondering. Does after >> a ~ 1s delay (or less, or more) _DPG_EXIT_DONE indication eventually >> change by CSME to 0? (is it consistently) > > Never. It's consistently being 1. no. On my TGL platform is cleared by CSME: [Sun Oct 31 08:54:40 2021] s0ix exit: EXFWSM register: 0x00000000 [Sun Oct 31 08:54:40 2021] s0ix exit (right after sent H2ME): EXFWSM register: 0x00000000 [Sun Oct 31 08:54:40 2021] s0ix exit(after polling): EXFWSM register: 0x00000001 [Sun Oct 31 08:54:40 2021] e1000e 0000:00:1f.6 enp0s31f6: DPG_EXIT_DONE cleared after 130 msec > > Right now we are seeing the same issue on TGL, so I wonder if it's > better to just revert the CSME series? no. We need to investigate it and understand what is CSME state we hit. Meanwhile few options: 1. use privilege flags to disable s0ix flow for problematic system (power will increased) ethtool --set-priv-flags enp0s31f6 s0ix-enabled off ethtool --show-priv-flags enp0s31f6 Private flags for enp0s31f6: s0ix-enabled: off 2. delay as you suggested - less preferable I though 3. I would like to suggest (need to check it) in case the DPG_EXIT_DONE is 1 (and polling will be exit immediately) - let's perform enforce settings to the CSME, before write request to CSME unconfigure the device from s0ix : if (er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE) mac_data |= E1000_H2ME_ENFORCE_SETTINGS; I will update Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=214821 with this information. I also will need some another information regards SMB state in this case. > > Kai-Heng > >>>>> /* Poll up to 2.5 seconds for ME to unconfigure DPG. >>>>> * If this takes more than 1 second, show a warning indicating a >>>>> * firmware bug >>>>> >> From sasha.neftin at intel.com Tue Nov 2 06:29:04 2021 From: sasha.neftin at intel.com (Sasha Neftin) Date: Tue, 2 Nov 2021 08:29:04 +0200 Subject: [Intel-wired-lan] [PATCH v2] e1000e: Add a delay to let ME unconfigure s0ix when DPG_EXIT_DONE is already flagged In-Reply-To: <49c5e91a-8e02-2a76-db5d-5f15df3c485f@intel.com> References: <20211026065112.1366205-1-kai.heng.feng@canonical.com> <04ed8307-ab1f-59d6-4454-c759ce4a453b@intel.com> <49c5e91a-8e02-2a76-db5d-5f15df3c485f@intel.com> Message-ID: On 11/2/2021 08:24, Sasha Neftin wrote: > On 11/2/2021 05:27, Kai-Heng Feng wrote: >> On Fri, Oct 29, 2021 at 5:14 PM Sasha Neftin >> wrote: >>> >>> On 10/27/2021 01:50, Kai-Heng Feng wrote: >>>> On Tue, Oct 26, 2021 at 4:48 PM Sasha Neftin >>>> wrote: >>>>> >>>>> On 10/26/2021 09:51, Kai-Heng Feng wrote: >>>>>> On some ADL platforms, DPG_EXIT_DONE is always flagged so e1000e >>>>>> resume >>>>>> polling logic doesn't wait until ME really unconfigures s0ix. >>>>>> >>>>>> So check DPG_EXIT_DONE before issuing EXIT_DPG, and if it's already >>>>>> flagged, wait for 1 second to let ME unconfigure s0ix. >>>>>> >>>>>> Fixes: 3e55d231716e ("e1000e: Add handshake with the CSME to >>>>>> support S0ix") >>>>>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=214821 >>>>>> Signed-off-by: Kai-Heng Feng >>>>>> --- >>>>>> v2: >>>>>> ??? Add missing "Fixes:" tag >>>>>> >>>>>> ??? drivers/net/ethernet/intel/e1000e/netdev.c | 7 +++++++ >>>>>> ??? 1 file changed, 7 insertions(+) >>>>>> >>>>>> diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c >>>>>> b/drivers/net/ethernet/intel/e1000e/netdev.c >>>>>> index 44e2dc8328a22..cd81ba00a6bc9 100644 >>>>>> --- a/drivers/net/ethernet/intel/e1000e/netdev.c >>>>>> +++ b/drivers/net/ethernet/intel/e1000e/netdev.c >>>>>> @@ -6493,14 +6493,21 @@ static void e1000e_s0ix_exit_flow(struct >>>>>> e1000_adapter *adapter) >>>>>> ??????? u32 mac_data; >>>>>> ??????? u16 phy_data; >>>>>> ??????? u32 i = 0; >>>>>> +???? bool dpg_exit_done; >>>>>> >>>>>> ??????? if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) { >>>>>> +???????????? dpg_exit_done = er32(EXFWSM) & >>>>>> E1000_EXFWSM_DPG_EXIT_DONE; >>>>>> ??????????????? /* Request ME unconfigure the device from S0ix */ >>>>>> ??????????????? mac_data = er32(H2ME); >>>>>> ??????????????? mac_data &= ~E1000_H2ME_START_DPG; >>>>>> ??????????????? mac_data |= E1000_H2ME_EXIT_DPG; >>>>>> ??????????????? ew32(H2ME, mac_data); >>>>>> >>>>>> +???????????? if (dpg_exit_done) { >>>>>> +???????????????????? e_warn("DPG_EXIT_DONE is already flagged. >>>>>> This is a firmware bug\n"); >>>>>> +???????????????????? msleep(1000); >>>>>> +???????????? } >>>>> Thanks for working on the enablement. >>>>> The delay approach is fragile. We need to work with CSME folks to >>>>> understand why _DPG_EXIT_DONE indication is wrong on some ADL >>>>> platforms. >>>>> Could you provide CSME/BIOS version? dmidecode -t 0 and cat >>>>> /sys/class/mei/mei0/fw_ver >>>> >>>> $ sudo dmidecode -t 0 >>>> # dmidecode 3.2 >>>> Getting SMBIOS data from sysfs. >>>> SMBIOS 3.4 present. >>>> # SMBIOS implementations newer than version 3.2.0 are not >>>> # fully supported by this version of dmidecode. >>>> >>>> Handle 0x0001, DMI type 0, 26 bytes >>>> BIOS Information >>>> ????????? Vendor: Dell Inc. >>>> ????????? Version: 0.12.68 >>>> ????????? Release Date: 10/01/2021 >>>> ????????? ROM Size: 48 MB >>>> ????????? Characteristics: >>>> ????????????????? PCI is supported >>>> ????????????????? PNP is supported >>>> ????????????????? BIOS is upgradeable >>>> ????????????????? BIOS shadowing is allowed >>>> ????????????????? Boot from CD is supported >>>> ????????????????? Selectable boot is supported >>>> ????????????????? EDD is supported >>>> ????????????????? Print screen service is supported (int 5h) >>>> ????????????????? 8042 keyboard services are supported (int 9h) >>>> ????????????????? Serial services are supported (int 14h) >>>> ????????????????? Printer services are supported (int 17h) >>>> ????????????????? ACPI is supported >>>> ????????????????? USB legacy is supported >>>> ????????????????? BIOS boot specification is supported >>>> ????????????????? Function key-initiated network boot is supported >>>> ????????????????? Targeted content distribution is supported >>>> ????????????????? UEFI is supported >>>> ????????? BIOS Revision: 0.12 >>>> >>>> $ cat /sys/class/mei/mei0/fw_ver >>>> 0:16.0.15.1518 >>>> 0:16.0.15.1518 >>>> 0:16.0.15.1518 >>>> >>> Thank you Kai-Heng. The _DPG_EXIT_DONE bit indication comes from the >>> EXFWSM register controlled by the CSME. We have only read access.? I >>> realized that this indication was set to 1 even before our request to >>> unconfigure the s0ix settings from the CSME. I am wondering. Does after >>> a ~ 1s delay (or less, or more) _DPG_EXIT_DONE indication eventually >>> change by CSME to 0? (is it consistently) >> >> Never. It's consistently being 1. > no. On my TGL platform is cleared by CSME: > [Sun Oct 31 08:54:40 2021] s0ix exit: EXFWSM register: 0x00000000 > [Sun Oct 31 08:54:40 2021] s0ix exit (right after sent H2ME): EXFWSM > register: 0x00000000 > [Sun Oct 31 08:54:40 2021] s0ix exit(after polling): EXFWSM register: > 0x00000001 > [Sun Oct 31 08:54:40 2021] e1000e 0000:00:1f.6 enp0s31f6: DPG_EXIT_DONE > cleared after 130 msec >> >> Right now we are seeing the same issue on TGL, so I wonder if it's >> better to just revert the CSME series? > no. We need to investigate it and understand what is CSME state we hit. > Meanwhile few options: > 1. use privilege flags to disable s0ix flow for problematic system > (power will increased) > ethtool --set-priv-flags enp0s31f6 s0ix-enabled off > ethtool --show-priv-flags enp0s31f6 > Private flags for enp0s31f6: > s0ix-enabled: off > 2. delay as you suggested - less preferable I though > 3. I would like to suggest (need to check it) in case the DPG_EXIT_DONE > is 1 (and polling will be exit immediately) - let's perform enforce > settings to the CSME, before write request to CSME unconfigure the > device from s0ix : > > if (er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE) > ????mac_data |= E1000_H2ME_ENFORCE_SETTINGS; > and then allow to CSME finish the enforcing synchronization: ew32(H2ME, mac_data); usleep_range(30000, 31000); > I will update Bugzilla: > https://bugzilla.kernel.org/show_bug.cgi?id=214821 with this information. > > I also will need some another information regards SMB state in this case. >> >> Kai-Heng >> >>>>>> ??????????????? /* Poll up to 2.5 seconds for ME to unconfigure DPG. >>>>>> ???????????????? * If this takes more than 1 second, show a >>>>>> warning indicating a >>>>>> ???????????????? * firmware bug >>>>>> >>> From sasha.neftin at intel.com Tue Nov 2 07:20:06 2021 From: sasha.neftin at intel.com (Sasha Neftin) Date: Tue, 2 Nov 2021 09:20:06 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Fix typo in i225 LTR functions Message-ID: <20211102072006.2757474-1-sasha.neftin@intel.com> The LTR maximum value was incorrectly written using the scale from the LTR minimum value. This would cause incorrect values to be sent, in cases where the initial calculation lead to different min/max scales. Suggested-by: Dima Ruinskiy Signed-off-by: Sasha Neftin --- drivers/net/ethernet/intel/igc/igc_i225.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_i225.c b/drivers/net/ethernet/intel/igc/igc_i225.c index b2ef9fde97b3..b6807e16eea9 100644 --- a/drivers/net/ethernet/intel/igc/igc_i225.c +++ b/drivers/net/ethernet/intel/igc/igc_i225.c @@ -636,7 +636,7 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link) ltrv = rd32(IGC_LTRMAXV); if (ltr_max != (ltrv & IGC_LTRMAXV_LTRV_MASK)) { ltrv = IGC_LTRMAXV_LSNP_REQ | ltr_max | - (scale_min << IGC_LTRMAXV_SCALE_SHIFT); + (scale_max << IGC_LTRMAXV_SCALE_SHIFT); wr32(IGC_LTRMAXV, ltrv); } } -- 2.25.1 From gurucharanx.g at intel.com Tue Nov 2 08:12:47 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Tue, 2 Nov 2021 08:12:47 +0000 Subject: [Intel-wired-lan] [PATCH v7 2/2] ice: support immediate firmware activation via devlink reload In-Reply-To: <20211027232255.669167-2-jacob.e.keller@intel.com> References: <20211027232255.669167-1-jacob.e.keller@intel.com> <20211027232255.669167-2-jacob.e.keller@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jacob Keller > Sent: Thursday, October 28, 2021 4:53 AM > To: Nguyen, Anthony L ; Intel Wired LAN wired-lan at lists.osuosl.org> > Cc: pmenzel at molgen.mpg.de > Subject: [Intel-wired-lan] [PATCH v7 2/2] ice: support immediate firmware > activation via devlink reload > > The ice hardware contains an embedded chip with firmware which can be > updated using devlink flash. The firmware which runs on this chip is referred to > as the Embedded Management Processor firmware (EMP firmware). > > Activating the new firmware image currently requires that the system be > rebooted. This is not ideal as rebooting the system can cause unwanted > downtime. > > In practical terms, activating the firmware does not always require a full > system reboot. In many cases it is possible to activate the EMP firmware > immediately. There are a couple of different scenarios to cover. > > * The EMP firmware itself can be reloaded by issuing a special update > to the device called an Embedded Management Processor reset (EMP > reset). This reset causes the device to reset and reload the EMP > firmware. > > * PCI configuration changes are only reloaded after a cold PCIe reset. > Unfortunately there is no generic way to trigger this for a PCIe > device without a system reboot. > > When performing a flash update, firmware is capable of responding with some > information about the specific update requirements. > > The driver updates the flash by programming a secondary inactive bank with > the contents of the new image, and then issuing a command to request to > switch the active bank starting from the next load. > > The response to the final command for updating the inactive NVM flash bank > includes an indication of the minimum reset required to fully update the > device. This can be one of the following: > > * A full power on is required > * A cold PCIe reset is required > * An EMP reset is required > > The response to the command to switch flash banks includes an indication of > whether or not the firmware will allow an EMP reset request. > > For most updates, an EMP reset is sufficient to load the new EMP firmware > without issues. In some cases, this reset is not sufficient because the PCI > configuration space has changed. When this could cause incompatibility with > the new EMP image, the firmware is capable of rejecting the EMP reset > request. > > Add logic to ice_fw_update.c to handle the response data flash update AdminQ > commands. > > For the reset level, issue a devlink status notification informing the user of how > to complete the update with a simple suggestion like "Activate new firmware > by rebooting the system". > > Cache the status of whether or not firmware will restrict the EMP reset for use > in implementing devlink reload. > > Implement support for devlink reload with the "fw_activate" flag. This allows > user space to request the firmware be activated immediately. > > For the .reload_down handler, we will issue a request for the EMP reset using > the appropriate firmware AdminQ command. If we know that the firmware will > not allow an EMP reset, simply exit with a suitable netlink extended ACK > message indicating that the EMP reset is not available. > > For the .reload_up handler, simply wait until the driver has finished resetting. > Logic to handle processing of an EMP reset already exists in the driver as part > of its reset and rebuild flows. > > Implement support for the devlink reload interface with the "fw_activate" > action. This allows userspace to request activation of firmware without a > reboot. > > Note that support for indicating the required reset and EMP reset restriction is > not supported on old versions of firmware. The driver can determine if the two > features are supported by checking the device capabilities report. I confirmed > support has existed since at least version 5.5.2 as reported by the 'fw.mgmt' > version. Support to issue the EMP reset request has existed in all version of the > EMP firmware for the ice hardware. > > Check the device capabilities report to determine whether or not the > indications are reported by the running firmware. If the reset requirement > indication is not supported, always assume a full power on is necessary. If the > reset restriction capability is not supported, always assume the EMP reset is > available. > > Users can verify if the EMP reset has activated the firmware by using the > devlink info report to check that the 'running' firmware version has updated. > For example a user might do the following: > > # Check current version > $ devlink dev info > > # Update the device > $ devlink dev flash pci/0000:af:00.0 file firmware.bin > > # Confirm stored version updated > $ devlink dev info > > # Reload to activate new firmware > $ devlink dev reload pci/0000:af:00.0 action fw_activate > > # Confirm running version updated > $ devlink dev info > > Finally, this change does *not* implement basic driver-only reload support. I > did look into trying to do this. However, it requires significant refactor of how > the ice driver probes and loads everything. > The ice driver probe and allocation flows were not designed with such a reload > in mind. Refactoring the flow to support this is beyond the scope of this change. > > Signed-off-by: Jacob Keller > --- > Changes since v6 > * none > > Changes since v5 > * Added a new patch that reduces the reset (and probe!) time > * Reduced the maximum timeout of reload_up to 1 minute. This is probably > still a bit overkill in terms of total wait but ensures we wait long > enough for cases where multiple PFs rebuild flows are serialized due to > locks > * Improved the error message when reset times out. > > Changes since v4 > * completely re-write commit message for clarity > * Update devlink ice.rst with documentation about reload > * expand the terms "EMP" and "empr" for clarity > * Rename the ice_devlink_reload_down to ice_devlink_reload_empr_start and > rename ice_devlink_reload_up to ice_devlink_reload_empr_finish. This is > done to clarify their functionality. It is also done because any future > support for devlink reload with driver reinit will want to continue > re-using these functions to support firmware activation. > * Increase the maximum wait time for EMP reset to complete to 2 minutes. > It turns out that in practice the reset might take a while (longer than > the original 20 seconds I had in v4 and earlier). > * Move the clearing of fw_emp_reset_disabled into the ice_rebuild logic. > This ensures the flag is properly cleared even when the EMP reset was > caused by another physical function. > * Add comments explaining the various reset levels that the firmware can > report. > > Changes since v3 > * correctly read response of NVM write activate from synchronous reply value > instead of from the ARQ event. This fixes a bug where we never reported > that EMP reset is available. > > Changes since v2 > * ensure DEVLINK_F_RELOAD gets set > * rebase to avoid conflicts > > Documentation/networking/devlink/ice.rst | 24 ++- > drivers/net/ethernet/intel/ice/ice.h | 1 + > .../net/ethernet/intel/ice/ice_adminq_cmd.h | 7 + > drivers/net/ethernet/intel/ice/ice_common.c | 12 ++ > drivers/net/ethernet/intel/ice/ice_devlink.c | 99 ++++++++++ > .../net/ethernet/intel/ice/ice_fw_update.c | 181 +++++++++++++++--- > .../net/ethernet/intel/ice/ice_fw_update.h | 2 + > drivers/net/ethernet/intel/ice/ice_main.c | 8 + > drivers/net/ethernet/intel/ice/ice_nvm.c | 19 +- > drivers/net/ethernet/intel/ice/ice_nvm.h | 2 +- > drivers/net/ethernet/intel/ice/ice_type.h | 4 + > 11 files changed, 330 insertions(+), 29 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Tue Nov 2 08:16:11 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Tue, 2 Nov 2021 08:16:11 +0000 Subject: [Intel-wired-lan] [PATCH net] ice: ignore dropped packets during init In-Reply-To: <20211023002817.86671-1-jesse.brandeburg@intel.com> References: <20211023002817.86671-1-jesse.brandeburg@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Jesse > Brandeburg > Sent: Saturday, October 23, 2021 5:58 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net] ice: ignore dropped packets during init > > If the hardware is constantly receiving unicast or broadcast packets during > driver load, the device previously counted many GLV_RDPC (VSI dropped > packets) events during init. This causes confusing dropped packet statistics > during driver load. The dropped packets counter incrementing does stop once > the driver finishes loading. > > Avoid this problem by baselining our statistics at the end of driver open instead > of the end of probe. > > Fixes: cdedef59deb0 ("ice: Configure VSIs for Tx/Rx") > Signed-off-by: Jesse Brandeburg > --- > Testing Hints: pktgen or ping flood the DUT, while reloading the driver and > bringing up the interface (in a script or with networkmanager) and note > dropped packets with ip -s -s link or ifconfig, after this patch there should be > none. > --- > drivers/net/ethernet/intel/ice/ice_main.c | 3 +++ > 1 file changed, 3 insertions(+) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Tue Nov 2 08:20:25 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Tue, 2 Nov 2021 08:20:25 +0000 Subject: [Intel-wired-lan] [PATCH v6 1/2] ice: reduce time to read Option ROM CIVD data In-Reply-To: <20211027224947.644211-1-jacob.e.keller@intel.com> References: <20211027224947.644211-1-jacob.e.keller@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jacob Keller > Sent: Thursday, October 28, 2021 4:20 AM > To: Nguyen, Anthony L ; Intel Wired LAN wired-lan at lists.osuosl.org> > Cc: pmenzel at molgen.mpg.de > Subject: [Intel-wired-lan] [PATCH v6 1/2] ice: reduce time to read Option ROM > CIVD data > > During probe and device reset, the ice driver reads some data from the NVM > image as part of ice_init_nvm. Part of this data includes a section of the Option > ROM which contains version information. > > The function ice_get_orom_civd_data is used to locate the '$CIV' data section > of the Option ROM. > > Timing of ice_probe and ice_rebuild indicate that the ice_get_orom_civd_data > function takes about 10 seconds to finish executing. > > The function locates the section by scanning the Option ROM every 512 bytes. > This requires a significant number of NVM read accesses, since the Option > ROM bank is 500KB. In the worst case it would take about 1000 reads. Worse, > all PFs serialize this operation during reload because of acquiring the NVM > semaphore. > > The CIVD section is located at the end of the Option ROM image data. > Unfortunately, the driver has no easy method to determine the offset manually. > Practical experiments have shown that the data could be at a variety of > locations, so simply reversing the scanning order is not sufficient to reduce the > overall read time. > > Instead, copy the entire contents of the Option ROM into memory. This allows > reading the data using 4Kb pages instead of 512 bytes at a time. > This reduces the total number of firmware commands by a factor of 8. In > addition, reading the whole section together at once allows better indication to > firmware of when we're "done". > > Re-write ice_get_orom_civd_data to allocate virtual memory to store the > Option ROM data. Copy the entire OptionROM contents at once using > ice_read_flash_module. Finally, use this memory copy to scan for the '$CIV' > section. > > This change significantly reduces the time to read the Option ROM CIVD > section from ~10 seconds down to ~1 second. This has a significant impact on > the total time to complete a driver rebuild or probe. > > Signed-off-by: Jacob Keller > --- > drivers/net/ethernet/intel/ice/ice_nvm.c | 47 ++++++++++++++++++------ > 1 file changed, 35 insertions(+), 12 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Tue Nov 2 08:22:26 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Tue, 2 Nov 2021 08:22:26 +0000 Subject: [Intel-wired-lan] [PATCH v7 1/2] ice: reduce time to read Option ROM CIVD data In-Reply-To: <20211027232255.669167-1-jacob.e.keller@intel.com> References: <20211027232255.669167-1-jacob.e.keller@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jacob Keller > Sent: Thursday, October 28, 2021 4:53 AM > To: Nguyen, Anthony L ; Intel Wired LAN wired-lan at lists.osuosl.org> > Cc: pmenzel at molgen.mpg.de > Subject: [Intel-wired-lan] [PATCH v7 1/2] ice: reduce time to read Option ROM > CIVD data > > During probe and device reset, the ice driver reads some data from the NVM > image as part of ice_init_nvm. Part of this data includes a section of the Option > ROM which contains version information. > > The function ice_get_orom_civd_data is used to locate the '$CIV' data section > of the Option ROM. > > Timing of ice_probe and ice_rebuild indicate that the ice_get_orom_civd_data > function takes about 10 seconds to finish executing. > > The function locates the section by scanning the Option ROM every 512 bytes. > This requires a significant number of NVM read accesses, since the Option > ROM bank is 500KB. In the worst case it would take about 1000 reads. Worse, > all PFs serialize this operation during reload because of acquiring the NVM > semaphore. > > The CIVD section is located at the end of the Option ROM image data. > Unfortunately, the driver has no easy method to determine the offset manually. > Practical experiments have shown that the data could be at a variety of > locations, so simply reversing the scanning order is not sufficient to reduce the > overall read time. > > Instead, copy the entire contents of the Option ROM into memory. This allows > reading the data using 4Kb pages instead of 512 bytes at a time. > This reduces the total number of firmware commands by a factor of 8. In > addition, reading the whole section together at once allows better indication to > firmware of when we're "done". > > Re-write ice_get_orom_civd_data to allocate virtual memory to store the > Option ROM data. Copy the entire OptionROM contents at once using > ice_read_flash_module. Finally, use this memory copy to scan for the '$CIV' > section. > > This change significantly reduces the time to read the Option ROM CIVD > section from ~10 seconds down to ~1 second. This has a significant impact on > the total time to complete a driver rebuild or probe. > > Signed-off-by: Jacob Keller > --- > Changes since v6 > * fix a memory leak > > Changes since v5 > * new patch > > drivers/net/ethernet/intel/ice/ice_nvm.c | 48 ++++++++++++++++++------ > 1 file changed, 36 insertions(+), 12 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From konrad0.jankowski at intel.com Tue Nov 2 11:59:45 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Tue, 2 Nov 2021 11:59:45 +0000 Subject: [Intel-wired-lan] [PATCH net-next v3] iavf: Add trace while removing device In-Reply-To: <20210622134348.342191-1-jedrzej.jagielski@intel.com> References: <20210622134348.342191-1-jedrzej.jagielski@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jedrzej Jagielski > Sent: wtorek, 22 czerwca 2021 15:44 > To: intel-wired-lan at lists.osuosl.org > Cc: Jagielski, Jedrzej > Subject: [Intel-wired-lan] [PATCH net-next v3] iavf: Add trace while removing > device > > From: = Jedrzej Jagielski > > Add kernel trace that device was removed. > Currently there is no such information. > I.e. Host admin removes a PCI device from a VM, than on VM shall be info > about the event. > > This patch adds info log to iavf_remove function. > > Signed-off-by: Arkadiusz Kubalewski > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c > b/drivers/net/ethernet/intel/iavf/iavf_main.c > index d64e2567e16e..60f08a5276b2 100644 > --- a/drivers/net/ethernet/intel/iavf/iavf_main.c > +++ b/drivers/net/ethernet/intel/iavf/iavf_main.c Tested-by: Konrad Jankowski From konrad0.jankowski at intel.com Tue Nov 2 12:14:50 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Tue, 2 Nov 2021 12:14:50 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor iavf_mac_filter struct memory usage In-Reply-To: <20210830082536.274203-1-jedrzej.jagielski@intel.com> References: <20210830082536.274203-1-jedrzej.jagielski@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jedrzej Jagielski > Sent: poniedzia?ek, 30 sierpnia 2021 10:26 > To: intel-wired-lan at lists.osuosl.org > Cc: Dziedziuch, SylwesterX ; Jagielski, > Jedrzej > Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor iavf_mac_filter > struct memory usage > > iavf_mac_filter struct contained couple boolean flags using up more memory > than is necessary. > Change the flags to be bitfields in an anonymous struct so all the flags now fit > in one byte. > > Signed-off-by: Sylwester Dziedziuch > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/iavf/iavf.h | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/ethernet/intel/iavf/iavf.h > b/drivers/net/ethernet/intel/iavf/iavf.h > index 21c95775509a..3feb9edb8131 100644 > --- a/drivers/net/ethernet/intel/iavf/iavf.h > +++ b/drivers/net/ethernet/intel/iavf/iavf.h Tested-by: Konrad Jankowski From konrad0.jankowski at intel.com Tue Nov 2 12:23:06 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Tue, 2 Nov 2021 12:23:06 +0000 Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix static code analysis warning In-Reply-To: <20210830083801.269798-1-karen.sornek@intel.com> References: <20210830083801.269798-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Karen Sornek > Sent: poniedzia?ek, 30 sierpnia 2021 10:38 > To: intel-wired-lan at lists.osuosl.org > Cc: Sornek, Karen > Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix static code analysis warning > > Change min() to min_t() to fix static code analysis warning of possible > overflow. > > Fixes: 6beb84a73ec5 ("i40e/i40evf: napi_poll must return the work done") > Signed-off-by: Paul Greenwalt > Signed-off-by: Karen Sornek > --- > drivers/net/ethernet/intel/iavf/iavf_txrx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c > b/drivers/net/ethernet/intel/iavf/iavf_txrx.c > index 3525eab8e..42c9f9dc2 100644 > --- a/drivers/net/ethernet/intel/iavf/iavf_txrx.c > +++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.c Tested-by: Konrad Jankowski From cnovikov at lynx.com Tue Nov 2 01:39:36 2021 From: cnovikov at lynx.com (Cyril Novikov) Date: Mon, 1 Nov 2021 18:39:36 -0700 Subject: [Intel-wired-lan] [PATCH v2 net] ixgbe: set X550 MDIO speed before talking to PHY Message-ID: <896681e4-fcd7-3187-8e59-75ce0896ebd3@lynx.com> The MDIO bus speed must be initialized before talking to the PHY the first time in order to avoid talking to it using a speed that the PHY doesn't support. This fixes HW initialization error -17 (IXGBE_ERR_PHY_ADDR_INVALID) on Denverton CPUs (a.k.a. the Atom C3000 family) on ports with a 10Gb network plugged in. On those devices, HLREG0[MDCSPD] resets to 1, which combined with the 10Gb network results in a 24MHz MDIO speed, which is apparently too fast for the connected PHY. PHY register reads over MDIO bus return garbage, leading to initialization failure. Reproduced with Linux kernel 4.19 and 5.15-rc7. Can be reproduced using the following setup: * Use an Atom C3000 family system with at least one X552 LAN on the SoC * Disable PXE or other BIOS network initialization if possible (the interface must not be initialized before Linux boots) * Connect a live 10Gb Ethernet cable to an X550 port * Power cycle (not reset, doesn't always work) the system and boot Linux * Observe: ixgbe interfaces w/ 10GbE cables plugged in fail with error -17 Signed-off-by: Cyril Novikov Fixes: e84db7272798 ("ixgbe: Introduce function to control MDIO speed") --- drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 3 +++ 1 file changed, 3 insertions(+) Patch v2 addresses review comments: add a Fixed line, move reproduction steps to the commit message. No changes to the code. diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c index 9724ffb16518..e4b50c7781ff 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c @@ -3405,6 +3405,9 @@ static s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw) /* flush pending Tx transactions */ ixgbe_clear_tx_pending(hw); + /* set MDIO speed before talking to the PHY in case it's the 1st time */ + ixgbe_set_mdio_speed(hw); + /* PHY ops must be identified and initialized prior to reset */ status = hw->phy.ops.init(hw); if (status == IXGBE_ERR_SFP_NOT_SUPPORTED || -- 2.19.1-412.replication From lkp at intel.com Tue Nov 2 13:35:12 2021 From: lkp at intel.com (kernel test robot) Date: Tue, 02 Nov 2021 21:35:12 +0800 Subject: [Intel-wired-lan] [tnguy-next-queue:master] BUILD SUCCESS 047304d0bfa5be2ace106974f87eec51e0832cd0 Message-ID: <61813e90.YEKjmB0qr+icxjyU%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git master branch HEAD: 047304d0bfa5be2ace106974f87eec51e0832cd0 netdevsim: fix uninit value in nsim_drv_configure_vfs() elapsed time: 800m configs tested: 113 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm allyesconfig arm allmodconfig arm64 defconfig s390 zfcpdump_defconfig arc nsim_700_defconfig powerpc sequoia_defconfig mips ip32_defconfig powerpc mpc837x_mds_defconfig arm mvebu_v7_defconfig mips loongson3_defconfig mips maltasmvp_defconfig m68k stmark2_defconfig arc axs103_defconfig powerpc bluestone_defconfig arm moxart_defconfig mips gcw0_defconfig arm corgi_defconfig mips malta_qemu_32r6_defconfig sh shmin_defconfig arm s3c2410_defconfig powerpc ep88xc_defconfig arm spitz_defconfig arm jornada720_defconfig sh se7705_defconfig powerpc tqm8xx_defconfig m68k m5475evb_defconfig powerpc cm5200_defconfig arm mvebu_v5_defconfig microblaze mmu_defconfig mips decstation_defconfig arm ep93xx_defconfig powerpc microwatt_defconfig s390 alldefconfig arm orion5x_defconfig arm randconfig-c002-20211101 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k defconfig m68k allmodconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nios2 allyesconfig csky defconfig alpha defconfig alpha allyesconfig nds32 defconfig h8300 allyesconfig arc defconfig xtensa allyesconfig sh allmodconfig parisc defconfig parisc allyesconfig s390 defconfig s390 allyesconfig s390 allmodconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 i386 allyesconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a012-20211101 x86_64 randconfig-a015-20211101 x86_64 randconfig-a016-20211101 x86_64 randconfig-a013-20211101 x86_64 randconfig-a011-20211101 x86_64 randconfig-a014-20211101 i386 randconfig-a016-20211101 i386 randconfig-a014-20211101 i386 randconfig-a015-20211101 i386 randconfig-a013-20211101 i386 randconfig-a011-20211101 i386 randconfig-a012-20211101 arc randconfig-r043-20211101 riscv randconfig-r042-20211101 s390 randconfig-r044-20211101 riscv nommu_k210_defconfig riscv nommu_virt_defconfig riscv defconfig riscv allyesconfig riscv allmodconfig riscv allnoconfig riscv rv32_defconfig um x86_64_defconfig um i386_defconfig x86_64 allyesconfig x86_64 defconfig x86_64 kexec x86_64 rhel-8.3-kselftests x86_64 rhel-8.3-func clang tested configs: x86_64 randconfig-a004-20211101 x86_64 randconfig-a006-20211101 x86_64 randconfig-a001-20211101 x86_64 randconfig-a002-20211101 x86_64 randconfig-a003-20211101 x86_64 randconfig-a005-20211101 i386 randconfig-a005-20211101 i386 randconfig-a006-20211101 i386 randconfig-a001-20211101 i386 randconfig-a003-20211101 i386 randconfig-a004-20211101 i386 randconfig-a002-20211101 hexagon randconfig-r041-20211101 hexagon randconfig-r045-20211101 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From lkp at intel.com Tue Nov 2 14:21:36 2021 From: lkp at intel.com (kernel test robot) Date: Tue, 02 Nov 2021 22:21:36 +0800 Subject: [Intel-wired-lan] [tnguy-next-queue:dev-queue] BUILD SUCCESS 18aeb4bdf06aecc8676eacd3efe2098d7da77ba0 Message-ID: <61814970.PRMT3XxTVyRmoW3J%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue branch HEAD: 18aeb4bdf06aecc8676eacd3efe2098d7da77ba0 i40e: Fix display error code in dmesg elapsed time: 773m configs tested: 120 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig sh landisk_defconfig mips malta_defconfig powerpc tqm8555_defconfig arm cerfcube_defconfig mips bcm63xx_defconfig arm mvebu_v7_defconfig mips loongson3_defconfig mips maltasmvp_defconfig m68k stmark2_defconfig arc axs103_defconfig powerpc bluestone_defconfig arm moxart_defconfig arc vdk_hs38_defconfig powerpc mpc8272_ads_defconfig mips xway_defconfig m68k allmodconfig sh apsh4ad0a_defconfig xtensa audio_kc705_defconfig s390 debug_defconfig powerpc mpc834x_itx_defconfig powerpc acadia_defconfig arm h5000_defconfig arc alldefconfig sh hp6xx_defconfig arm cm_x300_defconfig powerpc linkstation_defconfig sh se7712_defconfig riscv allnoconfig mips ath79_defconfig sh se7705_defconfig powerpc tqm8xx_defconfig m68k m5475evb_defconfig powerpc cm5200_defconfig arm mvebu_v5_defconfig microblaze mmu_defconfig openrisc alldefconfig arm s3c6400_defconfig powerpc ep8248e_defconfig sh migor_defconfig arm randconfig-c002-20211101 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k defconfig m68k allyesconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig h8300 allyesconfig arc defconfig xtensa allyesconfig sh allmodconfig parisc defconfig parisc allyesconfig s390 defconfig s390 allyesconfig s390 allmodconfig i386 allyesconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 nios2 defconfig arc allyesconfig nds32 allnoconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a012-20211101 x86_64 randconfig-a015-20211101 x86_64 randconfig-a016-20211101 x86_64 randconfig-a013-20211101 x86_64 randconfig-a011-20211101 x86_64 randconfig-a014-20211101 i386 randconfig-a016-20211101 i386 randconfig-a014-20211101 i386 randconfig-a015-20211101 i386 randconfig-a013-20211101 i386 randconfig-a011-20211101 i386 randconfig-a012-20211101 arc randconfig-r043-20211101 riscv randconfig-r042-20211101 s390 randconfig-r044-20211101 riscv allyesconfig riscv allmodconfig riscv nommu_k210_defconfig riscv defconfig riscv nommu_virt_defconfig riscv rv32_defconfig um x86_64_defconfig um i386_defconfig x86_64 allyesconfig x86_64 rhel-8.3-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec clang tested configs: x86_64 randconfig-a004-20211101 x86_64 randconfig-a006-20211101 x86_64 randconfig-a001-20211101 x86_64 randconfig-a002-20211101 x86_64 randconfig-a003-20211101 x86_64 randconfig-a005-20211101 i386 randconfig-a005-20211101 i386 randconfig-a001-20211101 i386 randconfig-a003-20211101 i386 randconfig-a004-20211101 i386 randconfig-a006-20211101 i386 randconfig-a002-20211101 hexagon randconfig-r041-20211101 hexagon randconfig-r045-20211101 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From george.kuruvinakunnel at intel.com Tue Nov 2 16:36:27 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Tue, 2 Nov 2021 16:36:27 +0000 Subject: [Intel-wired-lan] [PATCH net-next 07/15] iavf: Restore non MAC filters after link down In-Reply-To: <20210604165335.33329-7-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-7-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:53 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 07/15] iavf: Restore non MAC filters > after link down > > From: Akeem G Abodunrin > > Restore VLAN filters after the link is brought down, and up - since all filters are > deleted from HW during the netdev link down routine. > > Signed-off-by: Akeem G Abodunrin > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf.h | 1 + > drivers/net/ethernet/intel/iavf/iavf_main.c | 35 ++++++++++++++++++--- > 2 files changed, 31 insertions(+), 5 deletions(-) > Tested-by: George Kuruvinakunnel From tony.brelinski at intel.com Tue Nov 2 23:02:57 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:02:57 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1] igbvf: Refactor trace In-Reply-To: <20210707064025.55096-1-karen.sornek@intel.com> References: <20210707064025.55096-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Sornek, Karen > Sent: Tuesday, July 6, 2021 11:40 PM > To: intel-wired-lan at lists.osuosl.org > Cc: Sornek, Karen > Subject: [Intel-wired-lan] [PATCH net-next v1] igbvf: Refactor trace > > Refactoring "PF still resetting" message, because previous version looked like > a bug - it informed about changes that worked as designed but might > confuse users. Changes requested to make message more user-friendly. > > Signed-off-by: Karen Sornek > --- > drivers/net/ethernet/intel/igbvf/netdev.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:03:20 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:03:20 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1] i40e: Add ensurance of MacVlan resources for every trusted VF In-Reply-To: <20210617071926.256183-1-karen.sornek@intel.com> References: <20210617071926.256183-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Sornek, Karen > Sent: Thursday, June 17, 2021 12:19 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Patynowski, PrzemyslawX ; > Sornek, Karen > Subject: [Intel-wired-lan] [PATCH net-next v1] i40e: Add ensurance of > MacVlan resources for every trusted VF > > Trusted VF can use up every resource available, leaving nothing to other > trusted VFs. > Introduce define, which calculates MacVlan resources available based on > maximum available MacVlan resources, bare minimum for each VF and > number of currently allocated VFs. > > Signed-off-by: Przemyslaw Patynowski > > Signed-off-by: Karen Sornek > --- > .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 34 ++++++++++++++++--- > 1 file changed, 29 insertions(+), 5 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:03:43 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:03:43 +0000 Subject: [Intel-wired-lan] [PATCH net-next 6/7] ice: refactor PTYPE validating In-Reply-To: <20210716221644.45946-7-anthony.l.nguyen@intel.com> References: <20210716221644.45946-1-anthony.l.nguyen@intel.com> <20210716221644.45946-7-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, July 16, 2021 3:17 PM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 6/7] ice: refactor PTYPE validating > > From: Jeff Guo > > Since the capability of a PTYPE within a specific package could be negotiated > by checking the HW bit map, it means that there's no need to maintain a > different PTYPE list for each type of the package when parsing PTYPE. So > refactor the PTYPE validating mechanism. > > Signed-off-by: Jeff Guo > Signed-off-by: Tony Nguyen > --- > .../net/ethernet/intel/ice/ice_flex_type.h | 22 ++ > .../ethernet/intel/ice/ice_virtchnl_fdir.c | 274 +----------------- > .../net/ethernet/intel/ice/ice_virtchnl_pf.c | 207 ++++++------- > .../net/ethernet/intel/ice/ice_virtchnl_pf.h | 2 + > 4 files changed, 133 insertions(+), 372 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:04:01 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:04:01 +0000 Subject: [Intel-wired-lan] [PATCH net-next 5/7] ice: Add package PTYPE enable information In-Reply-To: <20210716221644.45946-6-anthony.l.nguyen@intel.com> References: <20210716221644.45946-1-anthony.l.nguyen@intel.com> <20210716221644.45946-6-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, July 16, 2021 3:17 PM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 5/7] ice: Add package PTYPE > enable information > > From: Haiyue Wang > > Scan the 'Marker Ptype TCAM' section to retrieve the Rx parser PTYPE enable > information from the current package. > > Signed-off-by: Haiyue Wang > --- > .../net/ethernet/intel/ice/ice_flex_pipe.c | 76 +++++++++++++++++++ > .../net/ethernet/intel/ice/ice_flex_pipe.h | 4 + > .../net/ethernet/intel/ice/ice_flex_type.h | 20 +++++ > drivers/net/ethernet/intel/ice/ice_type.h | 1 + > 4 files changed, 101 insertions(+) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:04:15 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:04:15 +0000 Subject: [Intel-wired-lan] [PATCH net-next 1/1] iavf: Enable setting RSS hash key In-Reply-To: <20210716221644.45946-1-anthony.l.nguyen@intel.com> References: <20210716221644.45946-1-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, July 16, 2021 3:17 PM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 1/1] iavf: Enable setting RSS hash > key > > Driver support for changing the RSS hash key exists, however, checks have > caused it to be reported as unsupported. Remove the check and allow the > hash key to be specified. > > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 18 ++++++++++-------- > 1 file changed, 10 insertions(+), 8 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:04:37 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:04:37 +0000 Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum queues is exceeded In-Reply-To: <20210823114344.7058-1-jedrzej.jagielski@intel.com> References: <20210823114344.7058-1-jedrzej.jagielski@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jagielski, Jedrzej > Sent: Monday, August 23, 2021 4:44 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Gawin, JaroslawX ; Jagielski, Jedrzej > > Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum > queues is exceeded > > Before this patch VF interface vanished when maximum queue number was > exceeded. Driver tried to add next queues even if there was not enough > space. PF sent incorrect number of queues to the VF when there were not > enough of them. > > Add an additional condition introduced to check available space in 'qp_pile' > before proceeding. > Also add the search for free space in PF queue pair piles. > > Without this patch VF interfaces are not seen when available space for > queues has been exceeded and following logs appears permanently in > dmesg: > "Unable to get VF config (-32)". > "VF 62 failed opcode 3, retval: -5" > "Unable to get VF config due to PF error condition, not retrying" > > Fixes: 7daa6bf3294e ("i40e: driver core headers") > Fixes: 41c445ff0f48 ("i40e: main driver core") > Signed-off-by: Jaroslaw Gawin > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/i40e/i40e.h | 2 +- > drivers/net/ethernet/intel/i40e/i40e_main.c | 49 +++++++++++---- > .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 59 +++++++++++++++++++ > 3 files changed, 96 insertions(+), 14 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Tue Nov 2 23:04:52 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Tue, 2 Nov 2021 23:04:52 +0000 Subject: [Intel-wired-lan] [PATCH] ice: rearm other interrupt cause register after enabling VFs In-Reply-To: <20210712115425.214965-1-paul.greenwalt@intel.com> References: <20210712115425.214965-1-paul.greenwalt@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Greenwalt, Paul > Sent: Monday, July 12, 2021 4:54 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH] ice: rearm other interrupt cause register > after enabling VFs > > The other interrupt cause register (OICR), global interrupt 0, is disabled when > enabling VFs to prevent handling VFLR. If the OICR is not rearmed then the > VF cannot communicate with the PF. > > Rearm the OICR after enabling VFs. > > Signed-off-by: Paul Greenwalt > --- > drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c | 4 ++++ > 1 file changed, 4 insertions(+) Tested-by: Tony Brelinski From andrew at lunn.ch Wed Nov 3 00:48:19 2021 From: andrew at lunn.ch (Andrew Lunn) Date: Wed, 3 Nov 2021 01:48:19 +0100 Subject: [Intel-wired-lan] [PATCH v2 net] ixgbe: set X550 MDIO speed before talking to PHY In-Reply-To: <896681e4-fcd7-3187-8e59-75ce0896ebd3@lynx.com> References: <896681e4-fcd7-3187-8e59-75ce0896ebd3@lynx.com> Message-ID: On Mon, Nov 01, 2021 at 06:39:36PM -0700, Cyril Novikov wrote: > The MDIO bus speed must be initialized before talking to the PHY the first > time in order to avoid talking to it using a speed that the PHY doesn't > support. > > This fixes HW initialization error -17 (IXGBE_ERR_PHY_ADDR_INVALID) on > Denverton CPUs (a.k.a. the Atom C3000 family) on ports with a 10Gb network > plugged in. On those devices, HLREG0[MDCSPD] resets to 1, which combined > with the 10Gb network results in a 24MHz MDIO speed, which is apparently > too fast for the connected PHY. PHY register reads over MDIO bus return > garbage, leading to initialization failure. > > Reproduced with Linux kernel 4.19 and 5.15-rc7. Can be reproduced using > the following setup: > > * Use an Atom C3000 family system with at least one X552 LAN on the SoC > * Disable PXE or other BIOS network initialization if possible > (the interface must not be initialized before Linux boots) > * Connect a live 10Gb Ethernet cable to an X550 port > * Power cycle (not reset, doesn't always work) the system and boot Linux > * Observe: ixgbe interfaces w/ 10GbE cables plugged in fail with error -17 > > Signed-off-by: Cyril Novikov > Fixes: e84db7272798 ("ixgbe: Introduce function to control MDIO speed") Reviewed-by: Andrew Lunn Andrew From konrad0.jankowski at intel.com Wed Nov 3 08:55:22 2021 From: konrad0.jankowski at intel.com (Jankowski, Konrad0) Date: Wed, 3 Nov 2021 08:55:22 +0000 Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix deadlock occurrence during resetting VF interface In-Reply-To: <20210907092540.59568-1-jedrzej.jagielski@intel.com> References: <20210907092540.59568-1-jedrzej.jagielski@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Jedrzej Jagielski > Sent: wtorek, 7 wrze?nia 2021 11:26 > To: intel-wired-lan at lists.osuosl.org > Cc: Gawin, JaroslawX ; Jagielski, Jedrzej > > Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix deadlock occurrence during > resetting VF interface > > System hangs if close the interface is called from the kernel during the > interface is in resetting state. > During resetting operation the link is closing but kernel didn't know it and it > tried to close this interface again what sometimes led to deadlock. > Inform kernel about current state of interface and turn off the flag IFF_UP > when interface is closing until reset is finished. > Previously it was most likely to hang the system when kernel (network > manager) tried to close the interface in the same time when interface was in > resetting state because of deadlock. > > Fixes: 3c8e0b989aa1 ("i40vf: don't stop me now") > Signed-off-by: Jaroslaw Gawin > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c > b/drivers/net/ethernet/intel/iavf/iavf_main.c > index 80437ef26391..a089c0cbc26c 100644 > --- a/drivers/net/ethernet/intel/iavf/iavf_main.c > +++ b/drivers/net/ethernet/intel/iavf/iavf_main.c > @@ -2207,6 +2207,7 @@ continue_reset: Tested-by: Konrad Jankowski From lkp at intel.com Wed Nov 3 09:59:17 2021 From: lkp at intel.com (kernel test robot) Date: Wed, 03 Nov 2021 17:59:17 +0800 Subject: [Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS 11d5a44cb7419a256a18b69c1b64c39e00987d3c Message-ID: <61825d75.cazgj+fNI7N9p8Gf%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue branch HEAD: 11d5a44cb7419a256a18b69c1b64c39e00987d3c igc: Fix typo in i225 LTR functions elapsed time: 722m configs tested: 128 configs skipped: 4 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm64 defconfig arm allmodconfig arm allyesconfig i386 randconfig-c001-20211103 arm lpc18xx_defconfig sh ecovec24_defconfig mips lemote2f_defconfig sh lboxre2_defconfig m68k hp300_defconfig sh ecovec24-romimage_defconfig powerpc kmeter1_defconfig mips rt305x_defconfig powerpc pq2fads_defconfig sh rsk7264_defconfig m68k m5249evb_defconfig mips tb0219_defconfig h8300 defconfig sh se7619_defconfig arm mps2_defconfig arm zeus_defconfig arm cm_x300_defconfig arm hisi_defconfig arm collie_defconfig powerpc mpc8540_ads_defconfig arm spear6xx_defconfig powerpc wii_defconfig mips vocore2_defconfig sh magicpanelr2_defconfig powerpc sam440ep_defconfig arm eseries_pxa_defconfig arm imx_v6_v7_defconfig riscv nommu_virt_defconfig h8300 h8300h-sim_defconfig arc haps_hs_smp_defconfig arm s3c6400_defconfig openrisc simple_smp_defconfig mips maltaaprp_defconfig sh se7206_defconfig powerpc mpc8313_rdb_defconfig s390 alldefconfig powerpc mpc837x_mds_defconfig ia64 zx1_defconfig arm xcep_defconfig x86_64 defconfig m68k mac_defconfig arm randconfig-c002-20211103 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k defconfig m68k allmodconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig xtensa allyesconfig h8300 allyesconfig arc defconfig sh allmodconfig parisc defconfig parisc allyesconfig s390 defconfig s390 allyesconfig s390 allmodconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 i386 allyesconfig mips allyesconfig mips allmodconfig powerpc allnoconfig powerpc allyesconfig powerpc allmodconfig x86_64 randconfig-a012-20211103 x86_64 randconfig-a015-20211103 x86_64 randconfig-a016-20211103 x86_64 randconfig-a011-20211103 x86_64 randconfig-a013-20211103 x86_64 randconfig-a014-20211103 i386 randconfig-a014-20211103 i386 randconfig-a016-20211103 i386 randconfig-a013-20211103 i386 randconfig-a015-20211103 i386 randconfig-a011-20211103 i386 randconfig-a012-20211103 arc randconfig-r043-20211103 riscv randconfig-r042-20211103 s390 randconfig-r044-20211103 riscv rv32_defconfig riscv nommu_k210_defconfig riscv allnoconfig riscv defconfig riscv allyesconfig riscv allmodconfig x86_64 rhel-8.3-kselftests um x86_64_defconfig um i386_defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 allyesconfig clang tested configs: mips randconfig-c004-20211103 arm randconfig-c002-20211103 i386 randconfig-c001-20211103 s390 randconfig-c005-20211103 powerpc randconfig-c003-20211103 riscv randconfig-c006-20211103 x86_64 randconfig-c007-20211103 x86_64 randconfig-a006-20211103 x86_64 randconfig-a004-20211103 x86_64 randconfig-a001-20211103 x86_64 randconfig-a002-20211103 x86_64 randconfig-a005-20211103 x86_64 randconfig-a003-20211103 i386 randconfig-a005-20211103 i386 randconfig-a003-20211103 i386 randconfig-a001-20211103 i386 randconfig-a004-20211103 i386 randconfig-a006-20211103 i386 randconfig-a002-20211103 hexagon randconfig-r041-20211103 hexagon randconfig-r045-20211103 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From lkp at intel.com Wed Nov 3 11:43:59 2021 From: lkp at intel.com (kernel test robot) Date: Wed, 03 Nov 2021 19:43:59 +0800 Subject: [Intel-wired-lan] [tnguy-next-queue:dev-queue] BUILD SUCCESS 5ebd29a6da84ef62e265a9bb421d67b7cd23d439 Message-ID: <618275ff.2a5hq+ykfIKPZCDu%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue branch HEAD: 5ebd29a6da84ef62e265a9bb421d67b7cd23d439 i40e: avoid spin loop in i40e_asq_send_command() elapsed time: 722m configs tested: 72 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm allyesconfig arm allmodconfig arm defconfig arm64 allyesconfig arm64 defconfig i386 randconfig-c001-20211103 powerpc ps3_defconfig nds32 defconfig arm socfpga_defconfig arm aspeed_g5_defconfig arm assabet_defconfig um defconfig mips tb0219_defconfig h8300 defconfig sh se7619_defconfig arm mps2_defconfig arm randconfig-c002-20211103 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k defconfig m68k allmodconfig m68k allyesconfig nios2 defconfig nds32 allnoconfig arc allyesconfig nios2 allyesconfig csky defconfig alpha defconfig alpha allyesconfig h8300 allyesconfig arc defconfig sh allmodconfig xtensa allyesconfig parisc defconfig s390 allyesconfig s390 allmodconfig parisc allyesconfig s390 defconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 i386 allyesconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a012-20211103 x86_64 randconfig-a015-20211103 x86_64 randconfig-a016-20211103 x86_64 randconfig-a011-20211103 x86_64 randconfig-a013-20211103 x86_64 randconfig-a014-20211103 riscv nommu_k210_defconfig riscv nommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscv allyesconfig riscv allmodconfig um x86_64_defconfig um i386_defconfig x86_64 rhel-8.3-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 allyesconfig clang tested configs: hexagon randconfig-r041-20211103 hexagon randconfig-r045-20211103 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From george.kuruvinakunnel at intel.com Wed Nov 3 19:41:44 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Wed, 3 Nov 2021 19:41:44 +0000 Subject: [Intel-wired-lan] [PATCH net-next 08/15] iavf: restore MSI state on reset In-Reply-To: <20210604165335.33329-8-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-8-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:53 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 08/15] iavf: restore MSI state on reset > > From: Mitch Williams > > If the PF experiences an FLR, the VF's MSI and MSI-X configuration will be > conveniently and silently removed in the process. When this happens, reset > recovery will appear to complete normally but no traffic will pass. The netdev > watchdog will helpfully notify everyone of this issue. > > To prevent such public embarrassment, restore MSI configuration at every reset. > For normal resets, this will do no harm, but for VF resets resulting from a PF FLR, > this will keep the VF working. > > Signed-off-by: Mitch Williams > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 1 + > 1 file changed, 1 insertion(+) > Tested-by: George Kuruvinakunnel From george.kuruvinakunnel at intel.com Wed Nov 3 19:45:15 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Wed, 3 Nov 2021 19:45:15 +0000 Subject: [Intel-wired-lan] [PATCH net-next 15/15] iavf: don't be so alarming In-Reply-To: <20210604165335.33329-15-anthony.l.nguyen@intel.com> References: <20210604165335.33329-1-anthony.l.nguyen@intel.com> <20210604165335.33329-15-anthony.l.nguyen@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Nguyen, Anthony L > Sent: Friday, June 4, 2021 9:54 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next 15/15] iavf: don't be so alarming > > From: Mitch Williams > > Reduce the log level of a couple of messages. These can appear during normal > reset and rmmod processing, and the driver recovers just fine. Debug level is fine > for these. > > Signed-off-by: Mitch Williams > Signed-off-by: Tony Nguyen > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 2 +- > drivers/net/ethernet/intel/iavf/iavf_virtchnl.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > Tested-by: George Kuruvinakunnel From david.switzer at intel.com Wed Nov 3 22:10:55 2021 From: david.switzer at intel.com (Switzer, David) Date: Wed, 3 Nov 2021 22:10:55 +0000 Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix display error code in dmesg In-Reply-To: <20211029092601.24709-1-mateusz.palczewski@intel.com> References: <20211029092601.24709-1-mateusz.palczewski@intel.com> Message-ID: >-----Original Message----- >From: Intel-wired-lan On Behalf Of >Mateusz Palczewski >Sent: Friday, October 29, 2021 2:26 AM >To: intel-wired-lan at lists.osuosl.org >Cc: Palczewski, Mateusz >Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix display error code in dmesg > >From: Grzegorz Szczurek > >Fix misleading display error in dmesg if tc filter return fail. >Only i40e status error code should be converted to string, not linux error code. >Otherwise, we return false information about the error. > >Fixes: 2f4b411a3d67 ("i40e: Enable cloud filters via tc-flower") >Signed-off-by: Grzegorz Szczurek >Signed-off-by: Mateusz Palczewski >--- > drivers/net/ethernet/intel/i40e/i40e_main.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > Tested-by: Dave Switzer From pmenzel at molgen.mpg.de Wed Nov 3 23:09:37 2021 From: pmenzel at molgen.mpg.de (Paul Menzel) Date: Thu, 4 Nov 2021 00:09:37 +0100 Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum queues is exceeded In-Reply-To: <20210823114344.7058-1-jedrzej.jagielski@intel.com> References: <20210823114344.7058-1-jedrzej.jagielski@intel.com> Message-ID: <2e3f1249-a62e-3829-a17b-46284174dc29@molgen.mpg.de> Dear Jaroslow, dear Jedrzej, On 23.08.21 13:43, Jedrzej Jagielski wrote: Maybe use: i40e: Handle case of depleted > Before this patch VF interface vanished when maximum queue > number was exceeded. Driver tried to add next queues even > if there was not enough space. PF sent incorrect number of > queues to the VF when there were not enough of them. > > Add an additional condition introduced to check > available space in 'qp_pile' before proceeding. > Also add the search for free space in PF queue pair piles. Please reflow for 75 characters per line. How is the new search better? > Without this patch VF interfaces are not seen when available > space for queues has been exceeded and following logs appears > permanently in dmesg: > "Unable to get VF config (-32)". > "VF 62 failed opcode 3, retval: -5" > "Unable to get VF config due to PF error condition, not retrying" Please add the new logs. > Fixes: 7daa6bf3294e ("i40e: driver core headers") > Fixes: 41c445ff0f48 ("i40e: main driver core") > Signed-off-by: Jaroslaw Gawin > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/i40e/i40e.h | 2 +- > drivers/net/ethernet/intel/i40e/i40e_main.c | 49 +++++++++++---- > .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 59 +++++++++++++++++++ > 3 files changed, 96 insertions(+), 14 deletions(-) > > diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h > index b10bc59c5700..fdfa96ece5f3 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e.h > +++ b/drivers/net/ethernet/intel/i40e/i40e.h > @@ -174,7 +174,6 @@ enum i40e_interrupt_policy { > > struct i40e_lump_tracking { > u16 num_entries; > - u16 search_hint; > u16 list[0]; > #define I40E_PILE_VALID_BIT 0x8000 > #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) > @@ -1156,6 +1155,7 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); > struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, > u16 downlink_seid, u8 enabled_tc); > void i40e_veb_release(struct i40e_veb *veb); > +int i40e_max_lump_qp(struct i40e_pf *pf); > > int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); > int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); > diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c > index 000991afcf27..32382d4a90e7 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e_main.c > +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c > @@ -178,16 +178,12 @@ int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) > * @id: an owner id to stick on the items assigned > * > * Returns the base item index of the lump, or negative for error > - * > - * The search_hint trick and lack of advanced fit-finding only work > - * because we're highly likely to have all the same size lump requests. > - * Linear search time and any fragmentation should be minimal. > **/ > static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > u16 needed, u16 id) > { > int ret = -ENOMEM; > - int i, j; > + u16 i, j; Please do not mix these changes into the patch. Additionally, using the native variable types does not harm. > if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { > dev_info(&pf->pdev->dev, > @@ -196,8 +192,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > return -EINVAL; > } > > - /* start the linear search with an imperfect hint */ > - i = pile->search_hint; > + i = 0; > while (i < pile->num_entries) { > /* skip already allocated entries */ > if (pile->list[i] & I40E_PILE_VALID_BIT) { > @@ -216,7 +211,6 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > for (j = 0; j < needed; j++) > pile->list[i+j] = id | I40E_PILE_VALID_BIT; > ret = i; > - pile->search_hint = i + j; > break; > } > > @@ -239,7 +233,7 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) > { > int valid_id = (id | I40E_PILE_VALID_BIT); > int count = 0; > - int i; > + u16 i; > > if (!pile || index >= pile->num_entries) > return -EINVAL; > @@ -251,12 +245,43 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) > count++; > } > > - if (count && index < pile->search_hint) > - pile->search_hint = index; > > return count; > } > > +/** > + * i40e_max_lump_qp - find a biggest size of lump available in qp_pile > + * @pf: pointer to private device data structure > + * > + * Returns the max size of lump in a qp_pile, or negative for error > + */ > +int i40e_max_lump_qp(struct i40e_pf *pf) > +{ > + struct i40e_lump_tracking *pile = pf->qp_pile; > + int pool_size, max_size; > + u16 i; unsigned int i; > + > + if (!pile) { > + dev_info(&pf->pdev->dev, > + "param err: pile=%s\n", > + pile ? "" : ""); > + return -EINVAL; > + } > + > + pool_size = 0; > + max_size = 0; > + for (i = 0; i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) { > + pool_size = 0; > + continue; > + } > + if (max_size < ++pool_size) > + max_size = pool_size; Maybe in one line: max_size = max(max_size, ++pool_size); > + } > + > + return max_size; > +} > + > /** > * i40e_find_vsi_from_id - searches for the vsi with the given id > * @pf: the pf structure to search for the vsi > @@ -11753,7 +11778,6 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf) > return -ENOMEM; > > pf->irq_pile->num_entries = vectors; > - pf->irq_pile->search_hint = 0; > > /* track first vector for misc interrupts, ignore return */ > (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); > @@ -12556,7 +12580,6 @@ static int i40e_sw_init(struct i40e_pf *pf) > goto sw_init_done; > } > pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; > - pf->qp_pile->search_hint = 0; > > pf->tx_timeout_recovery_level = 1; > > diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > index c007fba3d1dd..5a488ce5451b 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > @@ -2616,6 +2616,59 @@ error_param: > aq_ret); > } > > +/** > + * i40e_check_enough_queue - find enough queue find big enough queue? find big enough queue size? > + * @vf: pointer to the VF info > + * @needed: the number of items needed > + * > + * Returns the base item index of the queue, or negative for error > + **/ > +static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed) > +{ > + u16 i, cur_queues, more, pool_size; `unsigned int` or `size_t` where possible. > + struct i40e_lump_tracking *pile; > + struct i40e_pf *pf = vf->pf; > + struct i40e_vsi *vsi; > + > + vsi = pf->vsi[vf->lan_vsi_idx]; > + cur_queues = vsi->alloc_queue_pairs; > + > + /* if current allocated queues is enough for need */ > + if (cur_queues >= needed) > + return vsi->base_queue; > + > + pile = pf->qp_pile; > + if (cur_queues > 0) { > + /* if queues of allocated not zero, just check if Please improve the wording. > + * there is enough queues behind the allocated queues s/is/are/ > + * for more. > + */ > + more = needed - cur_queues; > + for (i = vsi->base_queue + cur_queues; > + i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) > + break; > + > + if (more-- == 1) > + /* there is enough */ > + return vsi->base_queue; > + } > + } > + > + pool_size = 0; > + for (i = 0; i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) { > + pool_size = 0; > + continue; > + } > + if (needed <= ++pool_size) > + /* there is enough */ > + return i; > + } > + > + return -ENOMEM; > +} > + > /** > * i40e_vc_request_queues_msg > * @vf: pointer to the VF info > @@ -2650,6 +2703,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg) > req_pairs - cur_pairs, > pf->queues_left); > vfres->num_queue_pairs = pf->queues_left + cur_pairs; > + } else if (i40e_check_enough_queue(vf, req_pairs) < 0) { > + dev_warn(&pf->pdev->dev, > + "VF %d requested %d more queues, but there is not enough for it.\n", > + vf->vf_id, > + req_pairs - cur_pairs); > + vfres->num_queue_pairs = cur_pairs; > } else { > /* successful request */ > vf->num_req_queues = req_pairs; > Kind regards, Paul From maciej.machnikowski at intel.com Thu Nov 4 08:12:25 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:25 +0100 Subject: [Intel-wired-lan] [PATCH net-next 0/6] Add RTNL interface for SyncE Message-ID: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Synchronous Ethernet networks use a physical layer clock to syntonize the frequency across different network elements. Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet Equipment Clock (EEC) and have the ability to recover synchronization from the synchronization inputs - either traffic interfaces or external frequency sources. The EEC can synchronize its frequency (syntonize) to any of those sources. It is also able to select synchronization source through priority tables and synchronization status messaging. It also provides neccessary filtering and holdover capabilities This patch series introduces basic interface for reading the Ethernet Equipment Clock (EEC) state on a SyncE capable device. This state gives information about the source of the syntonization signal (ether my port, or any external one) and the state of EEC. This interface is required\ to implement Synchronization Status Messaging on upper layers. RFC history: v2: - removed whitespace changes - fix issues reported by test robot v3: - Changed naming from SyncE to EEC - Clarify cover letter and commit message for patch 1 v4: - Removed sync_source and pin_idx info - Changed one structure to attributes - Added EEC_SRC_PORT flag to indicate that the EEC is synchronized to the recovered clock of a port that returns the state v5: - add EEC source as an optiona attribute - implement support for recovered clocks - align states returned by EEC to ITU-T G.781 v6: - fix EEC clock state reporting - add documentation - fix descriptions in code comments Maciej Machnikowski (6): ice: add support detecting features based on netlist rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status ice: add support for reading SyncE DPLL state rtnetlink: Add support for SyncE recovered clock configuration ice: add support for SyncE recovered clocks docs: net: Add description of SyncE interfaces Documentation/networking/synce.rst | 88 ++++++ drivers/net/ethernet/intel/ice/ice.h | 7 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 94 ++++++- drivers/net/ethernet/intel/ice/ice_common.c | 224 ++++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 20 +- drivers/net/ethernet/intel/ice/ice_devids.h | 3 + drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- drivers/net/ethernet/intel/ice/ice_main.c | 138 ++++++++++ drivers/net/ethernet/intel/ice/ice_ptp.c | 34 +++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 49 ++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 22 ++ drivers/net/ethernet/intel/ice/ice_type.h | 1 + include/linux/netdevice.h | 33 +++ include/uapi/linux/if_link.h | 57 ++++ include/uapi/linux/rtnetlink.h | 10 + net/core/rtnetlink.c | 253 ++++++++++++++++++ security/selinux/nlmsgtab.c | 6 +- 17 files changed, 1041 insertions(+), 4 deletions(-) create mode 100644 Documentation/networking/synce.rst -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:26 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:26 +0100 Subject: [Intel-wired-lan] [PATCH net-next 1/6] ice: add support detecting features based on netlist In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-2-maciej.machnikowski@intel.com> Add new functions to check netlist of a given board for: - Recovered Clock device, - Clock Generation Unit, - Clock Multiplexer, Initialize feature bits depending on detected components. Signed-off-by: Maciej Machnikowski --- drivers/net/ethernet/intel/ice/ice.h | 2 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 7 +- drivers/net/ethernet/intel/ice/ice_common.c | 123 ++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 9 ++ drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 1 + drivers/net/ethernet/intel/ice/ice_type.h | 1 + 7 files changed, 147 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index bf4ecd9a517c..3dc4caa41565 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -186,6 +186,8 @@ enum ice_feature { ICE_F_DSCP, + ICE_F_CGU, + ICE_F_PHY_RCLK, ICE_F_SMA_CTRL, ICE_F_MAX }; diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 4eef3488d86f..339c2a86f680 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1297,6 +1297,8 @@ struct ice_aqc_link_topo_params { #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) @@ -1333,7 +1335,10 @@ struct ice_aqc_link_topo_addr { struct ice_aqc_get_link_topo { struct ice_aqc_link_topo_addr addr; u8 node_part_num; -#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PKVL 0x31 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 u8 rsvd[9]; }; diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index b3066d0fea8b..35903b282885 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -274,6 +274,79 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); } +/** + * ice_aq_get_netlist_node + * @hw: pointer to the hw struct + * @cmd: get_link_topo AQ structure + * @node_part_number: output node part number if node found + * @node_handle: output node handle parameter if node found + */ +enum ice_status +ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle) +{ + struct ice_aq_desc desc; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); + desc.params.get_link_topo = *cmd; + + if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) + return ICE_ERR_NOT_SUPPORTED; + + if (node_handle) + *node_handle = + le16_to_cpu(desc.params.get_link_topo.addr.handle); + if (node_part_number) + *node_part_number = desc.params.get_link_topo.node_part_num; + + return ICE_SUCCESS; +} + +#define MAX_NETLIST_SIZE 10 +/** + * ice_find_netlist_node + * @hw: pointer to the hw struct + * @node_type_ctx: type of netlist node to look for + * @node_part_number: node part number to look for + * @node_handle: output parameter if node found - optional + * + * Find and return the node handle for a given node type and part number in the + * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST + * otherwise. If @node_handle provided, it would be set to found node handle. + */ +enum ice_status +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle) +{ + struct ice_aqc_get_link_topo cmd; + u8 rec_node_part_number; + enum ice_status status; + u16 rec_node_handle; + u8 idx; + + for (idx = 0; idx < MAX_NETLIST_SIZE; idx++) { + memset(&cmd, 0, sizeof(cmd)); + + cmd.addr.topo_params.node_type_ctx = + (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S); + cmd.addr.topo_params.index = idx; + + status = ice_aq_get_netlist_node(hw, &cmd, + &rec_node_part_number, + &rec_node_handle); + if (status) + return status; + + if (rec_node_part_number == node_part_number) { + if (node_handle) + *node_handle = rec_node_handle; + return ICE_SUCCESS; + } + } + + return ICE_ERR_DOES_NOT_EXIST; +} + /** * ice_is_media_cage_present * @pi: port information structure @@ -5083,3 +5156,53 @@ bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw) } return false; } + +/** + * ice_is_phy_rclk_present_e810t + * @hw: pointer to the hw struct + * + * Check if the PHY Recovered Clock device is present in the netlist + */ +bool ice_is_phy_rclk_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_PKVL, NULL)) + return false; + + return true; +} + +/** + * ice_is_cgu_present_e810t + * @hw: pointer to the hw struct + * + * Check if the Clock Generation Unit (CGU) device is present in the netlist + */ +bool ice_is_cgu_present_e810t(struct ice_hw *hw) +{ + if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032, + NULL)) { + hw->cgu_part_number = + ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032; + return true; + } + return false; +} + +/** + * ice_is_clock_mux_present_e810t + * @hw: pointer to the hw struct + * + * Check if the Clock Multiplexer device is present in the netlist + */ +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, + NULL)) + return false; + + return true; +} + diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index 65c1b3244264..b20a5c085246 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -89,6 +89,12 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, struct ice_aqc_get_phy_caps_data *caps, struct ice_sq_cd *cd); enum ice_status +ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle); +enum ice_status +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle); +enum ice_status ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, enum ice_adminq_opc opc, struct ice_sq_cd *cd); enum ice_status @@ -206,4 +212,7 @@ bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); enum ice_status ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); +bool ice_is_phy_rclk_present_e810t(struct ice_hw *hw); +bool ice_is_cgu_present_e810t(struct ice_hw *hw); +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); #endif /* _ICE_COMMON_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 40562600a8cf..2422215b7937 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -4183,8 +4183,12 @@ void ice_init_feature_support(struct ice_pf *pf) case ICE_DEV_ID_E810C_QSFP: case ICE_DEV_ID_E810C_SFP: ice_set_feature_support(pf, ICE_F_DSCP); - if (ice_is_e810t(&pf->hw)) + if (ice_is_clock_mux_present_e810t(&pf->hw)) ice_set_feature_support(pf, ICE_F_SMA_CTRL); + if (ice_is_phy_rclk_present_e810t(&pf->hw)) + ice_set_feature_support(pf, ICE_F_PHY_RCLK); + if (ice_is_cgu_present_e810t(&pf->hw)) + ice_set_feature_support(pf, ICE_F_CGU); break; default: break; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index 29f947c0cd2e..aa257db36765 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -800,3 +800,4 @@ bool ice_is_pca9575_present(struct ice_hw *hw) return !status && handle; } + diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h index 9e0c2923c62e..a9dc16641bd4 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -920,6 +920,7 @@ struct ice_hw { struct list_head rss_list_head; struct ice_mbx_snapshot mbx_snapshot; u16 io_expander_handle; + u8 cgu_part_number; }; /* Statistics collected by each port, VSI, VEB, and S-channel */ -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:27 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:27 +0100 Subject: [Intel-wired-lan] [PATCH net-next 2/6] rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-3-maciej.machnikowski@intel.com> This patch series introduces basic interface for reading the Ethernet Equipment Clock (EEC) state on a SyncE capable device. This state gives information about the state of EEC. This interface is required to implement Synchronization Status Messaging on upper layers. Initial implementation returns SyncE EEC state in the IFLA_EEC_STATE attribute. The optional index of input that's used as a source can be returned in the IFLA_EEC_SRC_IDX attribute. SyncE EEC state read needs to be implemented as a ndo_get_eec_state function. The index will be read by calling the ndo_get_eec_src. Signed-off-by: Maciej Machnikowski --- include/linux/netdevice.h | 13 ++++++ include/uapi/linux/if_link.h | 31 +++++++++++++ include/uapi/linux/rtnetlink.h | 3 ++ net/core/rtnetlink.c | 79 ++++++++++++++++++++++++++++++++++ security/selinux/nlmsgtab.c | 3 +- 5 files changed, 128 insertions(+), 1 deletion(-) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 3ec42495a43a..ef2b381dae0c 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1344,6 +1344,13 @@ struct netdev_net_notifier { * The caller must be under RCU read context. * int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); * Get the forwarding path to reach the real device from the HW destination address + * int (*ndo_get_eec_state)(struct net_device *dev, enum if_eec_state *state, + * u32 *src_idx, struct netlink_ext_ack *extack); + * Get state of physical layer frequency synchronization (SyncE) + * int (*ndo_get_eec_src)(struct net_device *dev, u32 *src, + * struct netlink_ext_ack *extack); + * Get the index of the source signal that's currently used as EEC's + * reference */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); @@ -1563,6 +1570,12 @@ struct net_device_ops { struct net_device * (*ndo_get_peer_dev)(struct net_device *dev); int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); + int (*ndo_get_eec_state)(struct net_device *dev, + enum if_eec_state *state, + struct netlink_ext_ack *extack); + int (*ndo_get_eec_src)(struct net_device *dev, + u32 *src, + struct netlink_ext_ack *extack); }; /** diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h index eebd3894fe89..8eae80f287e9 100644 --- a/include/uapi/linux/if_link.h +++ b/include/uapi/linux/if_link.h @@ -1273,4 +1273,35 @@ enum { #define IFLA_MCTP_MAX (__IFLA_MCTP_MAX - 1) +/* SyncE section */ + +enum if_eec_state { + IF_EEC_STATE_INVALID = 0, /* state is not valid */ + IF_EEC_STATE_FREERUN, /* clock is free-running */ + IF_EEC_STATE_LOCKED, /* clock is locked to the reference, + * but the holdover memory is not valid + */ + IF_EEC_STATE_LOCKED_HO_ACQ, /* clock is locked to the reference + * and holdover memory is valid + */ + IF_EEC_STATE_HOLDOVER, /* clock is in holdover mode */ +}; + +#define EEC_SRC_PORT (1 << 0) /* recovered clock from the port is + * currently the source for the EEC + */ + +struct if_eec_state_msg { + __u32 ifindex; +}; + +enum { + IFLA_EEC_UNSPEC, + IFLA_EEC_STATE, + IFLA_EEC_SRC_IDX, + __IFLA_EEC_MAX, +}; + +#define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) + #endif /* _UAPI_LINUX_IF_LINK_H */ diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h index 5888492a5257..1d8662afd6bd 100644 --- a/include/uapi/linux/rtnetlink.h +++ b/include/uapi/linux/rtnetlink.h @@ -185,6 +185,9 @@ enum { RTM_GETNEXTHOPBUCKET, #define RTM_GETNEXTHOPBUCKET RTM_GETNEXTHOPBUCKET + RTM_GETEECSTATE = 124, +#define RTM_GETEECSTATE RTM_GETEECSTATE + __RTM_MAX, #define RTM_MAX (((__RTM_MAX + 3) & ~3) - 1) }; diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 2af8aeeadadf..03bc773d0e69 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -5467,6 +5467,83 @@ static int rtnl_stats_dump(struct sk_buff *skb, struct netlink_callback *cb) return skb->len; } +static int rtnl_fill_eec_state(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, struct netlink_callback *cb, + int flags, struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + struct if_eec_state_msg *state_msg; + enum if_eec_state state; + struct nlmsghdr *nlh; + u32 src_idx; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_eec_state) + return -EOPNOTSUPP; + + err = ops->ndo_get_eec_state(dev, &state, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETEECSTATE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + if (nla_put_u32(skb, IFLA_EEC_STATE, state)) + return -EMSGSIZE; + + if (!ops->ndo_get_eec_src) + goto end_msg; + + err = ops->ndo_get_eec_src(dev, &src_idx, extack); + if (err) + return err; + + if (nla_put_u32(skb, IFLA_EEC_SRC_IDX, src_idx)) + return -EMSGSIZE; + +end_msg: + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_eec_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_eec_state(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + /* Process one rtnetlink message. */ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, @@ -5692,4 +5769,6 @@ void __init rtnetlink_init(void) rtnl_register(PF_UNSPEC, RTM_GETSTATS, rtnl_stats_get, rtnl_stats_dump, 0); + + rtnl_register(PF_UNSPEC, RTM_GETEECSTATE, rtnl_eec_state_get, NULL, 0); } diff --git a/security/selinux/nlmsgtab.c b/security/selinux/nlmsgtab.c index 94ea2a8b2bb7..2c66e722ea9c 100644 --- a/security/selinux/nlmsgtab.c +++ b/security/selinux/nlmsgtab.c @@ -91,6 +91,7 @@ static const struct nlmsg_perm nlmsg_route_perms[] = { RTM_NEWNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_DELNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETEECSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, }; static const struct nlmsg_perm nlmsg_tcpdiag_perms[] = @@ -176,7 +177,7 @@ int selinux_nlmsg_lookup(u16 sclass, u16 nlmsg_type, u32 *perm) * structures at the top of this file with the new mappings * before updating the BUILD_BUG_ON() macro! */ - BUILD_BUG_ON(RTM_MAX != (RTM_NEWNEXTHOPBUCKET + 3)); + BUILD_BUG_ON(RTM_MAX != (RTM_GETEECSTATE + 3)); err = nlmsg_perm(nlmsg_type, perm, nlmsg_route_perms, sizeof(nlmsg_route_perms)); break; -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:28 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:28 +0100 Subject: [Intel-wired-lan] [PATCH net-next 3/6] ice: add support for reading SyncE DPLL state In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-4-maciej.machnikowski@intel.com> Implement SyncE DPLL monitoring for E810-T devices. Poll loop will periodically check the state of the DPLL and cache it in the pf structure. State changes will be logged in the system log. Cached state can be read using the RTM_GETEECSTATE rtnetlink message. Signed-off-by: Maciej Machnikowski --- drivers/net/ethernet/intel/ice/ice.h | 5 ++ .../net/ethernet/intel/ice/ice_adminq_cmd.h | 34 +++++++++++++ drivers/net/ethernet/intel/ice/ice_common.c | 36 ++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 5 +- drivers/net/ethernet/intel/ice/ice_devids.h | 3 ++ drivers/net/ethernet/intel/ice/ice_main.c | 47 ++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp.c | 34 +++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 48 +++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 22 +++++++++ 9 files changed, 233 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index 3dc4caa41565..1dff7ca704d4 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -609,6 +609,11 @@ struct ice_pf { #define ICE_VF_AGG_NODE_ID_START 65 #define ICE_MAX_VF_AGG_NODES 32 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; + + enum if_eec_state synce_dpll_state; + u8 synce_dpll_pin; + enum if_eec_state ptp_dpll_state; + u8 ptp_dpll_pin; }; struct ice_netdev_priv { diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 339c2a86f680..11226af7a9a4 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1808,6 +1808,36 @@ struct ice_aqc_add_rdma_qset_data { struct ice_aqc_add_tx_rdma_qset_entry rdma_qsets[]; }; +/* Get CGU DPLL status (direct 0x0C66) */ +struct ice_aqc_get_cgu_dpll_status { + u8 dpll_num; + u8 ref_state; +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6) +#define ICE_AQC_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(7) + __le16 dpll_state; +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO BIT(1) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT 8 +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SEL \ + ICE_M(0x1F, ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT 13 +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE \ + ICE_M(0x7, ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT) + __le32 phase_offset_h; + __le32 phase_offset_l; + u8 eec_mode; + u8 rsvd[1]; + __le16 node_handle; +}; + /* Configure Firmware Logging Command (indirect 0xFF09) * Logging Information Read Response (indirect 0xFF10) * Note: The 0xFF10 command has no input parameters. @@ -2039,6 +2069,7 @@ struct ice_aq_desc { struct ice_aqc_fw_logging fw_logging; struct ice_aqc_get_clear_fw_log get_clear_fw_log; struct ice_aqc_download_pkg download_pkg; + struct ice_aqc_get_cgu_dpll_status get_cgu_dpll_status; struct ice_aqc_driver_shared_params drv_shared_params; struct ice_aqc_set_mac_lb set_mac_lb; struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; @@ -2205,6 +2236,9 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, + /* 1588/SyncE commands/events */ + ice_aqc_opc_get_cgu_dpll_status = 0x0C66, + ice_aqc_opc_driver_shared_params = 0x0C90, /* Standalone Commands/Events */ diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 35903b282885..8069141ac105 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -4644,6 +4644,42 @@ ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, return ice_status_to_errno(status); } +/** + * ice_aq_get_cgu_dpll_status + * @hw: pointer to the HW struct + * @dpll_num: DPLL index + * @ref_state: Reference clock state + * @dpll_state: DPLL state + * @phase_offset: Phase offset in ps + * @eec_mode: EEC_mode + * + * Get CGU DPLL status (0x0C66) + */ +enum ice_status +ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, + u16 *dpll_state, u64 *phase_offset, u8 *eec_mode) +{ + struct ice_aqc_get_cgu_dpll_status *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_dpll_status); + cmd = &desc.params.get_cgu_dpll_status; + cmd->dpll_num = dpll_num; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) { + *ref_state = cmd->ref_state; + *dpll_state = le16_to_cpu(cmd->dpll_state); + *phase_offset = le32_to_cpu(cmd->phase_offset_h); + *phase_offset <<= 32; + *phase_offset += le32_to_cpu(cmd->phase_offset_l); + *eec_mode = cmd->eec_mode; + } + + return status; +} + /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index b20a5c085246..aaed388a40a8 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -106,6 +106,7 @@ enum ice_status ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, struct ice_sq_cd *cd); bool ice_is_e810(struct ice_hw *hw); +bool ice_is_e810t(struct ice_hw *hw); enum ice_status ice_clear_pf_cfg(struct ice_hw *hw); enum ice_status ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, @@ -162,6 +163,9 @@ ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, int ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 *rdma_qset, u16 num_qsets, u32 *qset_teid); +enum ice_status +ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, + u16 *dpll_state, u64 *phase_offset, u8 *eec_mode); int ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, u16 *q_id); @@ -189,7 +193,6 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, void ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat); -bool ice_is_e810t(struct ice_hw *hw); enum ice_status ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, struct ice_aqc_txsched_elem_data *buf); diff --git a/drivers/net/ethernet/intel/ice/ice_devids.h b/drivers/net/ethernet/intel/ice/ice_devids.h index 61dd2f18dee8..0b654d417d29 100644 --- a/drivers/net/ethernet/intel/ice/ice_devids.h +++ b/drivers/net/ethernet/intel/ice/ice_devids.h @@ -58,4 +58,7 @@ /* Intel(R) Ethernet Connection E822-L 1GbE */ #define ICE_DEV_ID_E822L_SGMII 0x189A +#define ICE_SUBDEV_ID_E810T 0x000E +#define ICE_SUBDEV_ID_E810T2 0x000F + #endif /* _ICE_DEVIDS_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index f099797f35e3..da6cfe19259a 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c @@ -6240,6 +6240,51 @@ static void ice_napi_disable_all(struct ice_vsi *vsi) } } +/** + * ice_get_eec_state - get state of SyncE DPLL + * @netdev: network interface device structure + * @state: state of SyncE DPLL + * @eec_flags: EEC state flags + * @extack: netlink extended ack + */ +static int +ice_get_eec_state(struct net_device *netdev, enum if_eec_state *state, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *state = pf->synce_dpll_state; + + return 0; +} + +/** + * ice_get_eec_src - get reference index of SyncE DPLL + * @netdev: network interface device structure + * @src: index of source reference of the SyncE DPLL + * @extack: netlink extended ack + */ +static int +ice_get_eec_src(struct net_device *netdev, u32 *src, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *src = pf->synce_dpll_pin; + + return 0; +} + /** * ice_down - Shutdown the connection * @vsi: The VSI being stopped @@ -8601,4 +8646,6 @@ static const struct net_device_ops ice_netdev_ops = { .ndo_bpf = ice_xdp, .ndo_xdp_xmit = ice_xdp_xmit, .ndo_xsk_wakeup = ice_xsk_wakeup, + .ndo_get_eec_state = ice_get_eec_state, + .ndo_get_eec_src = ice_get_eec_src, }; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index bf7247c6f58e..a38d0ab4d6d5 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1766,6 +1766,36 @@ static void ice_ptp_tx_tstamp_cleanup(struct ice_ptp_tx *tx) } } +static void ice_handle_cgu_state(struct ice_pf *pf) +{ + enum if_eec_state cgu_state; + u8 pin; + + cgu_state = ice_get_zl_dpll_state(&pf->hw, ICE_CGU_DPLL_SYNCE, &pin); + if (pf->synce_dpll_state != cgu_state) { + pf->synce_dpll_state = cgu_state; + pf->synce_dpll_pin = pin; + + dev_warn(ice_pf_to_dev(pf), + " state changed to: %d, pin %d", + ICE_CGU_DPLL_SYNCE, + pf->synce_dpll_state, + pin); + } + + cgu_state = ice_get_zl_dpll_state(&pf->hw, ICE_CGU_DPLL_PTP, &pin); + if (pf->ptp_dpll_state != cgu_state) { + pf->ptp_dpll_state = cgu_state; + pf->ptp_dpll_pin = pin; + + dev_warn(ice_pf_to_dev(pf), + " state changed to: %d, pin %d", + ICE_CGU_DPLL_PTP, + pf->ptp_dpll_state, + pin); + } +} + static void ice_ptp_periodic_work(struct kthread_work *work) { struct ice_ptp *ptp = container_of(work, struct ice_ptp, work.work); @@ -1774,6 +1804,9 @@ static void ice_ptp_periodic_work(struct kthread_work *work) if (!test_bit(ICE_FLAG_PTP, pf->flags)) return; + if (ice_is_feature_supported(pf, ICE_F_CGU)) + ice_handle_cgu_state(pf); + ice_ptp_update_cached_phctime(pf); ice_ptp_tx_tstamp_cleanup(&pf->ptp.port.tx); @@ -1958,3 +1991,4 @@ void ice_ptp_release(struct ice_pf *pf) dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); } + diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index aa257db36765..7a9482918a20 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -375,6 +375,54 @@ static int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) return 0; } +/** + * ice_get_zl_dpll_state - get the state of the DPLL + * @hw: pointer to the hw struct + * @dpll_idx: Index of internal DPLL unit + * @pin: pointer to a buffer for returning currently active pin + * + * This function will read the state of the DPLL(dpll_idx). If optional + * parameter pin is given it'll be used to retrieve currently active pin. + * + * Return: state of the DPLL + */ +enum if_eec_state +ice_get_zl_dpll_state(struct ice_hw *hw, u8 dpll_idx, u8 *pin) +{ + enum ice_status status; + u64 phase_offset; + u16 dpll_state; + u8 ref_state; + u8 eec_mode; + + if (dpll_idx >= ICE_CGU_DPLL_MAX) + return IF_EEC_STATE_INVALID; + + status = ice_aq_get_cgu_dpll_status(hw, dpll_idx, &ref_state, + &dpll_state, &phase_offset, + &eec_mode); + if (status) + return IF_EEC_STATE_INVALID; + + if (pin) { + /* current ref pin in dpll_state_refsel_status_X register */ + *pin = (dpll_state & + ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SEL) >> + ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT; + } + + if (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK) { + if (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY) + return IF_EEC_STATE_LOCKED_HO_ACQ; + else + return IF_EEC_STATE_LOCKED; + } else if ((dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO) && + (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY)) { + return IF_EEC_STATE_HOLDOVER; + } + return IF_EEC_STATE_FREERUN; +} + /* Device agnostic functions * * The following functions implement useful behavior to hide the differences diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index b2984b5c22c1..fcd543531b2c 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -33,6 +33,8 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw); int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); bool ice_is_pca9575_present(struct ice_hw *hw); +enum if_eec_state +ice_get_zl_dpll_state(struct ice_hw *hw, u8 dpll_idx, u8 *pin); #define PFTSYN_SEM_BYTES 4 @@ -98,4 +100,24 @@ bool ice_is_pca9575_present(struct ice_hw *hw); #define ICE_SMA_MAX_BIT_E810T 7 #define ICE_PCA9575_P1_OFFSET 8 +enum ice_e810t_cgu_dpll { + ICE_CGU_DPLL_SYNCE, + ICE_CGU_DPLL_PTP, + ICE_CGU_DPLL_MAX +}; + +enum ice_e810t_cgu_pins { + REF0P, + REF0N, + REF1P, + REF1N, + REF2P, + REF2N, + REF3P, + REF3N, + REF4P, + REF4N, + NUM_E810T_CGU_PINS +}; + #endif /* _ICE_PTP_HW_H_ */ -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:29 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:29 +0100 Subject: [Intel-wired-lan] [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered clock configuration In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-5-maciej.machnikowski@intel.com> Add support for RTNL messages for reading/configuring SyncE recovered clocks. The messages are: RTM_GETRCLKRANGE: Reads the allowed pin index range for the recovered clock outputs. This can be aligned to PHY outputs or to EEC inputs, whichever is better for a given application RTM_GETRCLKSTATE: Read the state of recovered pins that output recovered clock from a given port. The message will contain the number of assigned clocks (IFLA_RCLK_STATE_COUNT) and a N pin inexes in IFLA_RCLK_STATE_OUT_IDX RTM_SETRCLKSTATE: Sets the redirection of the recovered clock for a given pin Signed-off-by: Maciej Machnikowski --- include/linux/netdevice.h | 9 ++ include/uapi/linux/if_link.h | 26 +++++ include/uapi/linux/rtnetlink.h | 7 ++ net/core/rtnetlink.c | 174 +++++++++++++++++++++++++++++++++ security/selinux/nlmsgtab.c | 3 + 5 files changed, 219 insertions(+) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index ef2b381dae0c..708bd8336155 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1576,6 +1576,15 @@ struct net_device_ops { int (*ndo_get_eec_src)(struct net_device *dev, u32 *src, struct netlink_ext_ack *extack); + int (*ndo_get_rclk_range)(struct net_device *dev, + u32 *min_idx, u32 *max_idx, + struct netlink_ext_ack *extack); + int (*ndo_set_rclk_out)(struct net_device *dev, + u32 out_idx, bool ena, + struct netlink_ext_ack *extack); + int (*ndo_get_rclk_state)(struct net_device *dev, + u32 out_idx, bool *ena, + struct netlink_ext_ack *extack); }; /** diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h index 8eae80f287e9..e27c153cfba3 100644 --- a/include/uapi/linux/if_link.h +++ b/include/uapi/linux/if_link.h @@ -1304,4 +1304,30 @@ enum { #define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) +struct if_rclk_range_msg { + __u32 ifindex; +}; + +enum { + IFLA_RCLK_RANGE_UNSPEC, + IFLA_RCLK_RANGE_MIN_PIN, + IFLA_RCLK_RANGE_MAX_PIN, + __IFLA_RCLK_RANGE_MAX, +}; + +struct if_set_rclk_msg { + __u32 ifindex; + __u32 out_idx; + __u32 flags; +}; + +#define SET_RCLK_FLAGS_ENA (1U << 0) + +enum { + IFLA_RCLK_STATE_UNSPEC, + IFLA_RCLK_STATE_OUT_IDX, + IFLA_RCLK_STATE_COUNT, + __IFLA_RCLK_STATE_MAX, +}; + #endif /* _UAPI_LINUX_IF_LINK_H */ diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h index 1d8662afd6bd..6c0d96d56ec7 100644 --- a/include/uapi/linux/rtnetlink.h +++ b/include/uapi/linux/rtnetlink.h @@ -185,6 +185,13 @@ enum { RTM_GETNEXTHOPBUCKET, #define RTM_GETNEXTHOPBUCKET RTM_GETNEXTHOPBUCKET + RTM_GETRCLKRANGE = 120, +#define RTM_GETRCLKRANGE RTM_GETRCLKRANGE + RTM_GETRCLKSTATE = 121, +#define RTM_GETRCLKSTATE RTM_GETRCLKSTATE + RTM_SETRCLKSTATE = 122, +#define RTM_SETRCLKSTATE RTM_SETRCLKSTATE + RTM_GETEECSTATE = 124, #define RTM_GETEECSTATE RTM_GETEECSTATE diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 03bc773d0e69..bc1e050f6d38 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -5544,6 +5544,176 @@ static int rtnl_eec_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, return err; } +static int rtnl_fill_rclk_range(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, + struct netlink_callback *cb, int flags, + struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + struct if_rclk_range_msg *state_msg; + struct nlmsghdr *nlh; + u32 min_idx, max_idx; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_rclk_range) + return -EOPNOTSUPP; + + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKRANGE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + if (nla_put_u32(skb, IFLA_RCLK_RANGE_MIN_PIN, min_idx) || + nla_put_u32(skb, IFLA_RCLK_RANGE_MAX_PIN, max_idx)) + return -EMSGSIZE; + + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_rclk_range_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_rclk_range(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + +static int rtnl_fill_rclk_state(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, + struct netlink_callback *cb, int flags, + struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + u32 min_idx, max_idx, src_idx, count = 0; + struct if_eec_state_msg *state_msg; + struct nlmsghdr *nlh; + bool ena; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_rclk_state || !ops->ndo_get_rclk_range) + return -EOPNOTSUPP; + + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKSTATE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + for (src_idx = min_idx; src_idx <= max_idx; src_idx++) { + ops->ndo_get_rclk_state(dev, src_idx, &ena, extack); + if (!ena) + continue; + + if (nla_put_u32(skb, IFLA_RCLK_STATE_OUT_IDX, src_idx)) + return -EMSGSIZE; + count++; + } + + if (nla_put_u32(skb, IFLA_RCLK_STATE_COUNT, count)) + return -EMSGSIZE; + + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_rclk_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_rclk_state(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + +static int rtnl_rclk_set(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_set_rclk_msg *state; + struct net_device *dev; + bool ena; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + if (!dev->netdev_ops->ndo_set_rclk_out) + return -EOPNOTSUPP; + + ena = !!(state->flags & SET_RCLK_FLAGS_ENA); + err = dev->netdev_ops->ndo_set_rclk_out(dev, state->out_idx, ena, + extack); + + return err; +} + /* Process one rtnetlink message. */ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, @@ -5770,5 +5940,9 @@ void __init rtnetlink_init(void) rtnl_register(PF_UNSPEC, RTM_GETSTATS, rtnl_stats_get, rtnl_stats_dump, 0); + rtnl_register(PF_UNSPEC, RTM_GETRCLKRANGE, rtnl_rclk_range_get, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_GETRCLKSTATE, rtnl_rclk_state_get, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_SETRCLKSTATE, rtnl_rclk_set, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_GETEECSTATE, rtnl_eec_state_get, NULL, 0); } diff --git a/security/selinux/nlmsgtab.c b/security/selinux/nlmsgtab.c index 2c66e722ea9c..57c7c85edd4d 100644 --- a/security/selinux/nlmsgtab.c +++ b/security/selinux/nlmsgtab.c @@ -91,6 +91,9 @@ static const struct nlmsg_perm nlmsg_route_perms[] = { RTM_NEWNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_DELNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETRCLKRANGE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_SETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETEECSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, }; -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:30 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:30 +0100 Subject: [Intel-wired-lan] [PATCH net-next 5/6] ice: add support for SyncE recovered clocks In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-6-maciej.machnikowski@intel.com> Implement NDO functions for handling SyncE recovered clocks. Signed-off-by: Maciej Machnikowski --- .../net/ethernet/intel/ice/ice_adminq_cmd.h | 53 +++++++++++ drivers/net/ethernet/intel/ice/ice_common.c | 65 +++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 6 ++ drivers/net/ethernet/intel/ice/ice_main.c | 91 +++++++++++++++++++ include/linux/netdevice.h | 11 +++ 5 files changed, 226 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 11226af7a9a4..dace00a35c44 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1281,6 +1281,31 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; +/* Set PHY recovered clock output (direct 0x0630) */ +struct ice_aqc_set_phy_rec_clk_out { + u8 phy_output; + u8 port_num; + u8 flags; +#define ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN BIT(0) +#define ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT 0xFF + u8 rsvd; + __le32 freq; + u8 rsvd2[6]; + __le16 node_handle; +}; + +/* Get PHY recovered clock output (direct 0x0631) */ +struct ice_aqc_get_phy_rec_clk_out { + u8 phy_output; + u8 port_num; + u8 flags; +#define ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN BIT(0) + u8 rsvd; + __le32 freq; + u8 rsvd2[6]; + __le16 node_handle; +}; + struct ice_aqc_link_topo_params { u8 lport_num; u8 lport_num_valid; @@ -1838,6 +1863,28 @@ struct ice_aqc_get_cgu_dpll_status { __le16 node_handle; }; +/* Read CGU register (direct 0x0C6E) */ +struct ice_aqc_read_cgu_reg { + __le16 offset; +#define ICE_AQC_READ_CGU_REG_MAX_DATA_LEN 16 + u8 data_len; + u8 rsvd[13]; +}; + +/* Read CGU register response (direct 0x0C6E) */ +struct ice_aqc_read_cgu_reg_resp { + u8 data[ICE_AQC_READ_CGU_REG_MAX_DATA_LEN]; +}; + +/* Write CGU register (direct 0x0C6F) */ +struct ice_aqc_write_cgu_reg { + __le16 offset; +#define ICE_AQC_WRITE_CGU_REG_MAX_DATA_LEN 7 + u8 data_len; + u8 data[ICE_AQC_WRITE_CGU_REG_MAX_DATA_LEN]; + u8 rsvd[6]; +}; + /* Configure Firmware Logging Command (indirect 0xFF09) * Logging Information Read Response (indirect 0xFF10) * Note: The 0xFF10 command has no input parameters. @@ -2033,6 +2080,8 @@ struct ice_aq_desc { struct ice_aqc_get_phy_caps get_phy; struct ice_aqc_set_phy_cfg set_phy; struct ice_aqc_restart_an restart_an; + struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out; + struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out; struct ice_aqc_gpio read_write_gpio; struct ice_aqc_sff_eeprom read_write_sff_param; struct ice_aqc_set_port_id_led set_port_id_led; @@ -2188,6 +2237,8 @@ enum ice_adminq_opc { ice_aqc_opc_get_link_status = 0x0607, ice_aqc_opc_set_event_mask = 0x0613, ice_aqc_opc_set_mac_lb = 0x0620, + ice_aqc_opc_set_phy_rec_clk_out = 0x0630, + ice_aqc_opc_get_phy_rec_clk_out = 0x0631, ice_aqc_opc_get_link_topo = 0x06E0, ice_aqc_opc_set_port_id_led = 0x06E9, ice_aqc_opc_set_gpio = 0x06EC, @@ -2238,6 +2289,8 @@ enum ice_adminq_opc { /* 1588/SyncE commands/events */ ice_aqc_opc_get_cgu_dpll_status = 0x0C66, + ice_aqc_opc_read_cgu_reg = 0x0C6E, + ice_aqc_opc_write_cgu_reg = 0x0C6F, ice_aqc_opc_driver_shared_params = 0x0C90, diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 8069141ac105..29d302ea1e56 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -5242,3 +5242,68 @@ bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) return true; } +/** + * ice_aq_set_phy_rec_clk_out - set RCLK phy out + * @hw: pointer to the HW struct + * @phy_output: PHY reference clock output pin + * @enable: GPIO state to be applied + * @freq: PHY output frequency + * + * Set CGU reference priority (0x0630) + * Return 0 on success or negative value on failure. + */ +enum ice_status +ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, + u32 *freq) +{ + struct ice_aqc_set_phy_rec_clk_out *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_rec_clk_out); + cmd = &desc.params.set_phy_rec_clk_out; + cmd->phy_output = phy_output; + cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; + cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; + cmd->freq = cpu_to_le32(*freq); + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) + *freq = le32_to_cpu(cmd->freq); + + return status; +} + +/** + * ice_aq_get_phy_rec_clk_out + * @hw: pointer to the HW struct + * @phy_output: PHY reference clock output pin + * @port_num: Port number + * @flags: PHY flags + * @freq: PHY output frequency + * + * Get PHY recovered clock output (0x0631) + */ +enum ice_status +ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, u8 *port_num, + u8 *flags, u32 *freq) +{ + struct ice_aqc_get_phy_rec_clk_out *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_rec_clk_out); + cmd = &desc.params.get_phy_rec_clk_out; + cmd->phy_output = phy_output; + cmd->port_num = *port_num; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) { + *port_num = cmd->port_num; + *flags = cmd->flags; + *freq = le32_to_cpu(cmd->freq); + } + + return status; +} + diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index aaed388a40a8..8a99c8364173 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -166,6 +166,12 @@ ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, enum ice_status ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, u16 *dpll_state, u64 *phase_offset, u8 *eec_mode); +enum ice_status +ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, + u32 *freq); +enum ice_status +ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, u8 *port_num, + u8 *flags, u32 *freq); int ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, u16 *q_id); diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index da6cfe19259a..127fad8fc8a8 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c @@ -6285,6 +6285,94 @@ ice_get_eec_src(struct net_device *netdev, u32 *src, return 0; } +/** + * ice_get_rclk_range - get range of recovered clock indices + * @netdev: network interface device structure + * @min_idx: min rclk index + * @max_idx: max rclk index + * @extack: netlink extended ack + */ +static int +ice_get_rclk_range(struct net_device *netdev, u32 *min_idx, u32 *max_idx, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *min_idx = REF1P; + *max_idx = REF1N; + + return 0; +} + +/** + * ice_set_rclk_out - set recovered clock redirection to the output pin + * @netdev: network interface device structure + * @out_idx: output index + * @ena: true will enable redirection, false will disable it + * @extack: netlink extended ack + */ +static int +ice_set_rclk_out(struct net_device *netdev, u32 out_idx, bool ena, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + enum ice_status ret; + u32 freq; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + if (out_idx < REF1P || out_idx > REF1N) + return -EINVAL; + + ret = ice_aq_set_phy_rec_clk_out(&pf->hw, out_idx - REF1P, ena, &freq); + + return ice_status_to_errno(ret); +} + +/** + * ice_get_rclk_state - Get state of recovered clock pin for a given netdev + * @netdev: network interface device structure + * @out_idx: output index + * @ena: returns true if the pin is enabled + * @extack: netlink extended ack + */ +static int +ice_get_rclk_state(struct net_device *netdev, u32 out_idx, bool *ena, + struct netlink_ext_ack *extack) +{ + u8 port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + enum ice_status ret; + u32 freq; + u8 flags; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + if (out_idx < REF1P || out_idx > REF1N) + return -EINVAL; + + ret = ice_aq_get_phy_rec_clk_out(&pf->hw, out_idx - REF1P, &port_num, + &flags, &freq); + + if (!ret && (flags & ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN)) + *ena = true; + else + *ena = false; + + return ice_status_to_errno(ret); +} + /** * ice_down - Shutdown the connection * @vsi: The VSI being stopped @@ -8648,4 +8736,7 @@ static const struct net_device_ops ice_netdev_ops = { .ndo_xsk_wakeup = ice_xsk_wakeup, .ndo_get_eec_state = ice_get_eec_state, .ndo_get_eec_src = ice_get_eec_src, + .ndo_get_rclk_range = ice_get_rclk_range, + .ndo_set_rclk_out = ice_set_rclk_out, + .ndo_get_rclk_state = ice_get_rclk_state, }; diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 708bd8336155..9faa005506d1 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1351,6 +1351,17 @@ struct netdev_net_notifier { * struct netlink_ext_ack *extack); * Get the index of the source signal that's currently used as EEC's * reference + * int (*ndo_get_rclk_range)(struct net_device *dev, u32 *min_idx, u32 *max_idx, + * struct netlink_ext_ack *extack); + * Get range of valid output indices for the set/get Recovered Clock + * functions + * int (*ndo_set_rclk_out)(struct net_device *dev, u32 out_idx, bool ena, + * struct netlink_ext_ack *extack); + * Set the receive clock recovery redirection to a given Recovered Clock + * output. + * int (*ndo_get_rclk_state)(struct net_device *dev, u32 out_idx, bool *ena, + * struct netlink_ext_ack *extack); + * Get current state of the recovered clock to pin mapping. */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); -- 2.26.3 From maciej.machnikowski at intel.com Thu Nov 4 08:12:31 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Thu, 4 Nov 2021 09:12:31 +0100 Subject: [Intel-wired-lan] [PATCH net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211104081231.1982753-1-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> Message-ID: <20211104081231.1982753-7-maciej.machnikowski@intel.com> Add Documentation/networking/synce.rst describing new RTNL messages and respective NDO ops supporting SyncE (Synchronous Ethernet). Signed-off-by: Maciej Machnikowski --- Documentation/networking/synce.rst | 88 ++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/networking/synce.rst diff --git a/Documentation/networking/synce.rst b/Documentation/networking/synce.rst new file mode 100644 index 000000000000..986b9e62809f --- /dev/null +++ b/Documentation/networking/synce.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Synchronous Ethernet +==================== + +Synchronous Ethernet networks use a physical layer clock to syntonize +the frequency across different network elements. + +Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet +Equipment Clock (EEC) and can recover synchronization +from the synchronization inputs - either traffic interfaces or external +frequency sources. +The EEC can synchronize its frequency (syntonize) to any of those sources. +It is also able to select a synchronization source through priority tables +and synchronization status messaging. It also provides necessary +filtering and holdover capabilities. + +The following interface can be applicable to diffferent packet network types +following ITU-T G.8261/G.8262 recommendations. + +Interface +========= + +The following RTNL messages are used to read/configure SyncE recovered +clocks. + +RTM_GETRCLKRANGE +----------------- +Reads the allowed pin index range for the recovered clock outputs. +This can be aligned to PHY outputs or to EEC inputs, whichever is +better for a given application. +Will call the ndo_get_rclk_range function to read the allowed range +of output pin indexes. +Will call ndo_get_rclk_range to determine the allowed recovered clock +range and return them in the IFLA_RCLK_RANGE_MIN_PIN and the +IFLA_RCLK_RANGE_MAX_PIN attributes + +RTM_GETRCLKSTATE +----------------- +Read the state of recovered pins that output recovered clock from +a given port. The message will contain the number of assigned clocks +(IFLA_RCLK_STATE_COUNT) and an N pin indexes in IFLA_RCLK_STATE_OUT_IDX +To support multiple recovered clock outputs from the same port, this message +will return the IFLA_RCLK_STATE_COUNT attribute containing the number of +active recovered clock outputs (N) and N IFLA_RCLK_STATE_OUT_IDX attributes +listing the active output indexes. +This message will call the ndo_get_rclk_range to determine the allowed +recovered clock indexes and then will loop through them, calling +the ndo_get_rclk_state for each of them. + +RTM_SETRCLKSTATE +----------------- +Sets the redirection of the recovered clock for a given pin. This message +expects one attribute: +struct if_set_rclk_msg { + __u32 ifindex; /* interface index */ + __u32 out_idx; /* output index (from a valid range) + __u32 flags; /* configuration flags */ +}; + +Supported flags are: +SET_RCLK_FLAGS_ENA - if set in flags - the given output will be enabled, + if clear - the output will be disabled. + +RTM_GETEECSTATE +---------------- +Reads the state of the EEC or equivalent physical clock synchronizer. +This message returns the following attributes: +IFLA_EEC_STATE - current state of the EEC or equivalent clock generator. + The states returned in this attribute are aligned to the + ITU-T G.781 and are: + IF_EEC_STATE_INVALID - state is not valid + IF_EEC_STATE_FREERUN - clock is free-running + IF_EEC_STATE_LOCKED - clock is locked to the reference, + but the holdover memory is not valid + IF_EEC_STATE_LOCKED_HO_ACQ - clock is locked to the reference + and holdover memory is valid + IF_EEC_STATE_HOLDOVER - clock is in holdover mode +State is read from the netdev calling the: +int (*ndo_get_eec_state)(struct net_device *dev, enum if_eec_state *state, + u32 *src_idx, struct netlink_ext_ack *extack); + +IFLA_EEC_SRC_IDX - optional attribute returning the index of the reference that + is used for the current IFLA_EEC_STATE, i.e., the index of + the pin that the EEC is locked to. + +Will be returned only if the ndo_get_eec_src is implemented. \ No newline at end of file -- 2.26.3 From nechamax.kraus at linux.intel.com Thu Nov 4 09:05:45 2021 From: nechamax.kraus at linux.intel.com (Kraus, NechamaX) Date: Thu, 4 Nov 2021 11:05:45 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Remove unused _I_PHY_ID define In-Reply-To: <20211013061926.464744-1-sasha.neftin@intel.com> References: <20211013061926.464744-1-sasha.neftin@intel.com> Message-ID: <56cf525d-5abe-6b4d-80d8-ae3fae2c5097@linux.intel.com> On 10/13/2021 09:19, Sasha Neftin wrote: > _I_PHY_ID not in use. Clean up the code accordingly, > and get rid of the unused define > > Signed-off-by: Sasha Neftin > --- > drivers/net/ethernet/intel/igc/igc_defines.h | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h > index fad27a4fea78..910ad1a0d375 100644 > --- a/drivers/net/ethernet/intel/igc/igc_defines.h > +++ b/drivers/net/ethernet/intel/igc/igc_defines.h > @@ -605,9 +605,6 @@ > #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */ > #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */ > > -/* Bit definitions for valid PHY IDs. I = Integrated E = External */ > -#define I225_I_PHY_ID 0x67C9DC00 > - > /* MDI Control */ > #define IGC_MDIC_DATA_MASK 0x0000FFFF > #define IGC_MDIC_REG_MASK 0x001F0000 > Tested-by: Nechama Kraus From nechamax.kraus at linux.intel.com Thu Nov 4 09:06:33 2021 From: nechamax.kraus at linux.intel.com (Kraus, NechamaX) Date: Thu, 4 Nov 2021 11:06:33 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Remove unused phy type In-Reply-To: <20211025071636.818173-1-sasha.neftin@intel.com> References: <20211025071636.818173-1-sasha.neftin@intel.com> Message-ID: <77a03195-2650-f2dc-2420-775aaf6a8d71@linux.intel.com> On 10/25/2021 10:16, Sasha Neftin wrote: > _phy_none type not in use. Clean up the code accordingly, > and get rid of the unused enum line > > Signed-off-by: Sasha Neftin > --- > drivers/net/ethernet/intel/igc/igc_hw.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/net/ethernet/intel/igc/igc_hw.h b/drivers/net/ethernet/intel/igc/igc_hw.h > index 587db7483f25..76832e55cbbb 100644 > --- a/drivers/net/ethernet/intel/igc/igc_hw.h > +++ b/drivers/net/ethernet/intel/igc/igc_hw.h > @@ -55,7 +55,6 @@ enum igc_mac_type { > > enum igc_phy_type { > igc_phy_unknown = 0, > - igc_phy_none, > igc_phy_i225, > }; > Tested-by: Nechama Kraus From nechamax.kraus at linux.intel.com Thu Nov 4 09:08:23 2021 From: nechamax.kraus at linux.intel.com (Kraus, NechamaX) Date: Thu, 4 Nov 2021 11:08:23 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Remove obsolete nvm type In-Reply-To: <20211031104556.2312804-1-sasha.neftin@intel.com> References: <20211031104556.2312804-1-sasha.neftin@intel.com> Message-ID: On 10/31/2021 12:45, Sasha Neftin wrote: > i225 devices use only spi nvm type. This patch comes to tidy up > obsolete nvm types. > > Signed-off-by: Sasha Neftin > --- > drivers/net/ethernet/intel/igc/igc_hw.h | 2 -- > drivers/net/ethernet/intel/igc/igc_i225.c | 2 -- > 2 files changed, 4 deletions(-) > > Tested-by: Nechama Kraus From nechamax.kraus at linux.intel.com Thu Nov 4 09:09:53 2021 From: nechamax.kraus at linux.intel.com (Kraus, NechamaX) Date: Thu, 4 Nov 2021 11:09:53 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Fix typo in i225 LTR functions In-Reply-To: <20211102072006.2757474-1-sasha.neftin@intel.com> References: <20211102072006.2757474-1-sasha.neftin@intel.com> Message-ID: On 11/2/2021 09:20, Sasha Neftin wrote: > The LTR maximum value was incorrectly written using the scale from > the LTR minimum value. This would cause incorrect values to be sent, > in cases where the initial calculation lead to different min/max scales. > > Suggested-by: Dima Ruinskiy > Signed-off-by: Sasha Neftin > --- > drivers/net/ethernet/intel/igc/igc_i225.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/intel/igc/igc_i225.c b/drivers/net/ethernet/intel/igc/igc_i225.c > index b2ef9fde97b3..b6807e16eea9 100644 > --- a/drivers/net/ethernet/intel/igc/igc_i225.c > +++ b/drivers/net/ethernet/intel/igc/igc_i225.c > @@ -636,7 +636,7 @@ s32 igc_set_ltr_i225(struct igc_hw *hw, bool link) > ltrv = rd32(IGC_LTRMAXV); > if (ltr_max != (ltrv & IGC_LTRMAXV_LTRV_MASK)) { > ltrv = IGC_LTRMAXV_LSNP_REQ | ltr_max | > - (scale_min << IGC_LTRMAXV_SCALE_SHIFT); > + (scale_max << IGC_LTRMAXV_SCALE_SHIFT); > wr32(IGC_LTRMAXV, ltrv); > } > } > Tested-by: Nechama Kraus From nechamax.kraus at linux.intel.com Thu Nov 4 09:18:15 2021 From: nechamax.kraus at linux.intel.com (Kraus, NechamaX) Date: Thu, 4 Nov 2021 11:18:15 +0200 Subject: [Intel-wired-lan] [PATCH v1 1/1] igc: Remove obsolete nvm type In-Reply-To: <20211031104556.2312804-1-sasha.neftin@intel.com> References: <20211031104556.2312804-1-sasha.neftin@intel.com> Message-ID: <9bfd7d2d-f227-f44f-e8a4-423ec32e1e75@linux.intel.com> On 10/31/2021 12:45, Sasha Neftin wrote: > i225 devices use only spi nvm type. This patch comes to tidy up > obsolete nvm types. > > Signed-off-by: Sasha Neftin > --- > drivers/net/ethernet/intel/igc/igc_hw.h | 2 -- > drivers/net/ethernet/intel/igc/igc_i225.c | 2 -- > 2 files changed, 4 deletions(-) > Tested-by: Nechama Kraus From karol.kolacinski at intel.com Thu Nov 4 13:52:11 2021 From: karol.kolacinski at intel.com (Karol Kolacinski) Date: Thu, 4 Nov 2021 14:52:11 +0100 Subject: [Intel-wired-lan] [PATCH intel-next] ice: Use div64_u64 instead of div_u64 in adjfine Message-ID: <20211104135211.21315-1-karol.kolacinski@intel.com> Change the division in ice_ptp_adjfine from div_u64 to div64_u64. div_u64 is used when the divisor is 32 bit but in this case incval is 64 bit and it caused incorrect calculations and incval adjustments. Signed-off-by: Karol Kolacinski --- drivers/net/ethernet/intel/ice/ice_ptp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 2b3b2060b504..2149595cc632 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1104,7 +1104,7 @@ static int ice_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm) scaled_ppm = -scaled_ppm; } - while ((u64)scaled_ppm > div_u64(U64_MAX, incval)) { + while ((u64)scaled_ppm > div64_u64(U64_MAX, incval)) { /* handle overflow by scaling down the scaled_ppm and * the divisor, losing some precision */ -- 2.32.0 From karol.kolacinski at intel.com Thu Nov 4 13:58:36 2021 From: karol.kolacinski at intel.com (Karol Kolacinski) Date: Thu, 4 Nov 2021 14:58:36 +0100 Subject: [Intel-wired-lan] [PATCH intel-next] ice: Don't put stale timestamps in the skb Message-ID: <20211104135836.24301-1-karol.kolacinski@intel.com> The driver has to check if it does not accidentally put the timestamp in the SKB before previous timestamp gets overwritten. Timestamp values in the PHY are read only and do not get cleared except at hardware reset or when a new timestamp value is captured. The cached_tstamp field is used to detect the case where a new timestamp has not yet been captured, ensuring that we avoid sending stale timestamp data to the stack. --- drivers/net/ethernet/intel/ice/ice_ptp.c | 11 ++++------- drivers/net/ethernet/intel/ice/ice_ptp.h | 6 ++++++ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 2b3b2060b504..9a1a09661c78 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2069,19 +2069,16 @@ static void ice_ptp_tx_tstamp_work(struct kthread_work *work) if (err) continue; - /* Check if the timestamp is valid */ - if (!(raw_tstamp & ICE_PTP_TS_VALID)) + /* Check if the timestamp is invalid or stale */ + if (!(raw_tstamp & ICE_PTP_TS_VALID) || + raw_tstamp == tx->tstamps[idx].cached_tstamp) continue; - /* clear the timestamp register, so that it won't show valid - * again when re-used. - */ - ice_clear_phy_tstamp(hw, tx->quad, phy_idx); - /* The timestamp is valid, so we'll go ahead and clear this * index and then send the timestamp up to the stack. */ spin_lock(&tx->lock); + tx->tstamps[idx].cached_tstamp = raw_tstamp; clear_bit(idx, tx->in_use); skb = tx->tstamps[idx].skb; tx->tstamps[idx].skb = NULL; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h index 92b202ef3c15..eef8ec894871 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp.h @@ -55,15 +55,21 @@ struct ice_perout_channel { * struct ice_tx_tstamp - Tracking for a single Tx timestamp * @skb: pointer to the SKB for this timestamp request * @start: jiffies when the timestamp was first requested + * @cached_tstamp: last read timestamp * * This structure tracks a single timestamp request. The SKB pointer is * provided when initiating a request. The start time is used to ensure that * we discard old requests that were not fulfilled within a 2 second time * window. + * Timestamp values in the PHY are read only and do not get cleared except at + * hardware reset or when a new timestamp value is captured. The cached_tstamp + * field is used to detect the case where a new timestamp has not yet been + * captured, ensuring that we avoid sending stale timestamp data to the stack. */ struct ice_tx_tstamp { struct sk_buff *skb; unsigned long start; + u64 cached_tstamp; }; /** -- 2.32.0 From kuba at kernel.org Thu Nov 4 18:08:55 2021 From: kuba at kernel.org (Jakub Kicinski) Date: Thu, 4 Nov 2021 11:08:55 -0700 Subject: [Intel-wired-lan] [PATCH net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211104081231.1982753-7-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-7-maciej.machnikowski@intel.com> Message-ID: <20211104110855.3ead1642@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> On Thu, 4 Nov 2021 09:12:31 +0100 Maciej Machnikowski wrote: > +Synchronous Ethernet networks use a physical layer clock to syntonize > +the frequency across different network elements. > + > +Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet > +Equipment Clock (EEC) and can recover synchronization > +from the synchronization inputs - either traffic interfaces or external > +frequency sources. > +The EEC can synchronize its frequency (syntonize) to any of those sources. > +It is also able to select a synchronization source through priority tables > +and synchronization status messaging. It also provides necessary > +filtering and holdover capabilities. > + > +The following interface can be applicable to diffferent packet network types > +following ITU-T G.8261/G.8262 recommendations. Can we get a diagram in here in terms of how the port feeds its recovered Rx freq into EEC and that feeds freq of Tx on other ports? I'm still struggling to understand your reasoning around not making EEC its own object. "We can do this later" seems like trading relatively little effort now for extra work for driver and application developers for ever. Also patch 3 still has a kdoc warning. From george.kuruvinakunnel at intel.com Thu Nov 4 18:36:53 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Thu, 4 Nov 2021 18:36:53 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor text of informational message In-Reply-To: <20210831101202.3532-1-karen.sornek@intel.com> References: <20210831101202.3532-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Karen > Sornek > Sent: Tuesday, August 31, 2021 3:12 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Bruce Allan ; Sornek, Karen > > Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor text of informational > message > > This message is intended to be informational to indicate a reset is about to > happen, but the use of "warning" in the message text can cause concern with > users. Reword the message to make it less alarming. > > Signed-off-by: Bruce Allan > Signed-off-by: Karen Sornek > --- > drivers/net/ethernet/intel/iavf/iavf_virtchnl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Tested-by: George Kuruvinakunnel From george.kuruvinakunnel at intel.com Thu Nov 4 20:26:18 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Thu, 4 Nov 2021 20:26:18 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor string format to avoid static analysis warnings In-Reply-To: <20210831113901.156388-1-karen.sornek@intel.com> References: <20210831113901.156388-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Karen > Sornek > Sent: Tuesday, August 31, 2021 4:39 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Sornek, Karen ; Swiatkowski, Michal > > Subject: [Intel-wired-lan] [PATCH net-next v1] iavf: Refactor string format to avoid > static analysis warnings > > Change format to match variable type that is used in string. > > Use %u format for unsigned variable and %d format for signed variable to remove > static analysis warnings. > > Signed-off-by: Michal Swiatkowski > Signed-off-by: Karen Sornek > --- > drivers/net/ethernet/intel/iavf/iavf_main.c | 6 +++--- > drivers/net/ethernet/intel/iavf/iavf_virtchnl.c | 2 +- > 2 files changed, 4 insertions(+), 4 deletions(-) > Tested-by: George Kuruvinakunnel From george.kuruvinakunnel at intel.com Thu Nov 4 20:49:41 2021 From: george.kuruvinakunnel at intel.com (Kuruvinakunnel, George) Date: Thu, 4 Nov 2021 20:49:41 +0000 Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix RTNL deadlock with new flag IAVF_FLAG_REINIT_MSIX_NEEDED In-Reply-To: <20210901091503.77708-1-karen.sornek@intel.com> References: <20210901091503.77708-1-karen.sornek@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Karen > Sornek > Sent: Wednesday, September 1, 2021 2:15 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Williams, Mitch A ; Sornek, Karen > > Subject: [Intel-wired-lan] [PATCH net v1] iavf: Fix RTNL deadlock with new flag > IAVF_FLAG_REINIT_MSIX_NEEDED > > The IAVF_FLAG_REINIT_ITR_NEEDED flag was being used for two different > purposes. As originally written, it indicates to the ITR mechanism to update the > interrupt registers to a new setting. Sometime later, it was overloaded to indicate > that interrupts need to be completely reinitialized during reset. This causes > problems when ethtool -C is used while a reset is in progress, and can lead to > RTNL deadlocks. > > To fix this, add a new flag IAVF_FLAG_REINIT_MSIX_NEEDED and use that to > trigger MSI-X reinit. > > Fixes: 129cf89e5856 ("iavf: rename functions and structs to new name") > Signed-off-by: Mitch Williams > Signed-off-by: Karen Sornek > --- > drivers/net/ethernet/intel/iavf/iavf.h | 1 + > drivers/net/ethernet/intel/iavf/iavf_main.c | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > Tested-by: George Kuruvinakunnel From tony.brelinski at intel.com Thu Nov 4 22:36:28 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Thu, 4 Nov 2021 22:36:28 +0000 Subject: [Intel-wired-lan] [PATCH v2 5/5] ixgbevf: Add support for new mailbox communication between PF and VF In-Reply-To: <20210630081532.3069914-6-radoslawx.tyl@intel.com> References: <20210630081532.3069914-1-radoslawx.tyl@intel.com> <20210630081532.3069914-6-radoslawx.tyl@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Tyl, RadoslawX > Sent: Wednesday, June 30, 2021 1:16 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Tyl, RadoslawX ; Skajewski, PiotrX > > Subject: [Intel-wired-lan] [PATCH v2 5/5] ixgbevf: Add support for new > mailbox communication between PF and VF > > Provide improved mailbox communication, between PF and VF, which is > defined as API version 1.5. > > Signed-off-by: Radoslaw Tyl > --- > drivers/net/ethernet/intel/ixgbevf/ipsec.c | 1 + > drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | 9 +++++++++ > drivers/net/ethernet/intel/ixgbevf/mbx.h | 1 + > drivers/net/ethernet/intel/ixgbevf/vf.c | 14 ++++++++++++-- > 4 files changed, 23 insertions(+), 2 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Thu Nov 4 22:36:48 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Thu, 4 Nov 2021 22:36:48 +0000 Subject: [Intel-wired-lan] [PATCH v2 4/5] ixgbevf: Mailbox improvements In-Reply-To: <20210630081532.3069914-5-radoslawx.tyl@intel.com> References: <20210630081532.3069914-1-radoslawx.tyl@intel.com> <20210630081532.3069914-5-radoslawx.tyl@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Tyl, RadoslawX > Sent: Wednesday, June 30, 2021 1:16 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Tyl, RadoslawX ; Skajewski, PiotrX > > Subject: [Intel-wired-lan] [PATCH v2 4/5] ixgbevf: Mailbox improvements > > Improve reliability of the mailbox communication and remove its potential > flaws that may lead to the undefined or faulty behavior. > > Recently some users reported issues on ESX with 10G Intel NICs which were > found to be caused by incorrect implementation of the PF-VF mailbox > communication. > > Technical investigation highlighted areas to improve in the communication > between PF or VF that wants to send the message (sender) and the other > part which receives the message (receiver): > > - Locking the mailbox when the sender wants to send a message > - Releasing the mailbox when the communication ends > - Returning the result of the mailbox message execution > > Signed-off-by: Radoslaw Tyl > --- > drivers/net/ethernet/intel/ixgbevf/defines.h | 1 + > drivers/net/ethernet/intel/ixgbevf/ipsec.c | 8 +- > drivers/net/ethernet/intel/ixgbevf/ixgbevf.h | 5 + > drivers/net/ethernet/intel/ixgbevf/mbx.c | 313 +++++++++++++++---- > drivers/net/ethernet/intel/ixgbevf/vf.c | 17 +- > drivers/net/ethernet/intel/ixgbevf/vf.h | 5 +- > 6 files changed, 265 insertions(+), 84 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Thu Nov 4 22:37:06 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Thu, 4 Nov 2021 22:37:06 +0000 Subject: [Intel-wired-lan] [PATCH v2 3/5] ixgbevf: Add legacy suffix to old API mailbox functions In-Reply-To: <20210630081532.3069914-4-radoslawx.tyl@intel.com> References: <20210630081532.3069914-1-radoslawx.tyl@intel.com> <20210630081532.3069914-4-radoslawx.tyl@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Tyl, RadoslawX > Sent: Wednesday, June 30, 2021 1:16 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Tyl, RadoslawX ; Skajewski, PiotrX > > Subject: [Intel-wired-lan] [PATCH v2 3/5] ixgbevf: Add legacy suffix to old API > mailbox functions > > Add legacy suffix to mailbox functions which should be backwards > compatible with older PF drivers. Communication during API negotiation > always has to be done using the earlier implementation. > > Signed-off-by: Radoslaw Tyl > --- > drivers/net/ethernet/intel/ixgbevf/ixgbevf.h | 2 +- > drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | 2 +- > drivers/net/ethernet/intel/ixgbevf/mbx.c | 14 +++++++------- > 3 files changed, 9 insertions(+), 9 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Thu Nov 4 22:37:23 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Thu, 4 Nov 2021 22:37:23 +0000 Subject: [Intel-wired-lan] [PATCH v2 2/5] ixgbevf: Improve error handling in mailbox In-Reply-To: <20210630081532.3069914-3-radoslawx.tyl@intel.com> References: <20210630081532.3069914-1-radoslawx.tyl@intel.com> <20210630081532.3069914-3-radoslawx.tyl@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Tyl, RadoslawX > Sent: Wednesday, June 30, 2021 1:15 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Tyl, RadoslawX ; Skajewski, PiotrX > > Subject: [Intel-wired-lan] [PATCH v2 2/5] ixgbevf: Improve error handling in > mailbox > > Add new handling for error codes: > IXGBE_ERR_CONFIG - ixgbe_mbx_operations is not correctly set > IXGBE_ERR_TIMEOUT - mailbox operation, e.g. poll for message, timeout > > Signed-off-by: Radoslaw Tyl > --- > drivers/net/ethernet/intel/ixgbevf/defines.h | 3 +++ > drivers/net/ethernet/intel/ixgbevf/mbx.c | 14 ++++++++++---- > drivers/net/ethernet/intel/ixgbevf/mbx.h | 1 - > 3 files changed, 13 insertions(+), 5 deletions(-) Tested-by: Tony Brelinski From tony.brelinski at intel.com Thu Nov 4 22:37:44 2021 From: tony.brelinski at intel.com (Brelinski, Tony) Date: Thu, 4 Nov 2021 22:37:44 +0000 Subject: [Intel-wired-lan] [PATCH v2 1/5] ixgbevf: Rename MSGTYPE to SUCCESS and FAILURE In-Reply-To: <20210630081532.3069914-2-radoslawx.tyl@intel.com> References: <20210630081532.3069914-1-radoslawx.tyl@intel.com> <20210630081532.3069914-2-radoslawx.tyl@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of > Tyl, RadoslawX > Sent: Wednesday, June 30, 2021 1:15 AM > To: intel-wired-lan at lists.osuosl.org > Cc: Tyl, RadoslawX ; Skajewski, PiotrX > > Subject: [Intel-wired-lan] [PATCH v2 1/5] ixgbevf: Rename MSGTYPE to > SUCCESS and FAILURE > > There is name similarity within IXGBE_VT_MSGTYPE_ACK and > PFMAILBOX.ACK / VFMAILBOX.ACK. MSGTYPE macros are renamed to > SUCCESS and FAILURE because they are not specified in datasheet and now > will be easily distinguishable. > > Signed-off-by: Radoslaw Tyl > --- > drivers/net/ethernet/intel/ixgbevf/ipsec.c | 2 +- > drivers/net/ethernet/intel/ixgbevf/mbx.h | 17 +++++++----- > drivers/net/ethernet/intel/ixgbevf/vf.c | 31 +++++++++++----------- > 3 files changed, 27 insertions(+), 23 deletions(-) Tested-by: Tony Brelinski From lkp at intel.com Fri Nov 5 03:47:44 2021 From: lkp at intel.com (kernel test robot) Date: Fri, 05 Nov 2021 11:47:44 +0800 Subject: [Intel-wired-lan] [tnguy-net-queue:100GbE] BUILD SUCCESS e6ba5273d4ede03d075d7a116b8edad1f6115f4d Message-ID: <6184a960.XTelG4cjhkxaJDch%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git 100GbE branch HEAD: e6ba5273d4ede03d075d7a116b8edad1f6115f4d ice: Fix race conditions between virtchnl handling and VF ndo ops elapsed time: 2069m configs tested: 307 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm allyesconfig arm64 defconfig arm allmodconfig i386 randconfig-c001-20211103 i386 randconfig-c001-20211104 i386 randconfig-c001-20211105 powerpc motionpro_defconfig ia64 generic_defconfig powerpc tqm8560_defconfig mips gcw0_defconfig powerpc walnut_defconfig mips cu1000-neo_defconfig m68k bvme6000_defconfig parisc allyesconfig powerpc sam440ep_defconfig sh kfr2r09-romimage_defconfig mips bmips_stb_defconfig xtensa audio_kc705_defconfig arm spear13xx_defconfig powerpc mpc8315_rdb_defconfig h8300 allyesconfig sh se7750_defconfig arm xcep_defconfig mips pic32mzda_defconfig m68k sun3_defconfig arm orion5x_defconfig mips cavium_octeon_defconfig mips omega2p_defconfig powerpc sequoia_defconfig arm eseries_pxa_defconfig mips qi_lb60_defconfig arm sama7_defconfig powerpc microwatt_defconfig sh sh7785lcr_defconfig sh kfr2r09_defconfig powerpc mgcoge_defconfig arm exynos_defconfig riscv allnoconfig m68k stmark2_defconfig arm gemini_defconfig powerpc g5_defconfig arm lpc32xx_defconfig arm collie_defconfig arm at91_dt_defconfig m68k m5208evb_defconfig powerpc fsp2_defconfig arm colibri_pxa270_defconfig sh sh7785lcr_32bit_defconfig m68k m5475evb_defconfig mips loongson1b_defconfig m68k amcore_defconfig powerpc adder875_defconfig powerpc mpc832x_rdb_defconfig sh secureedge5410_defconfig microblaze mmu_defconfig powerpc ppa8548_defconfig arm sunxi_defconfig nios2 alldefconfig mips fuloong2e_defconfig powerpc mpc512x_defconfig arm oxnas_v6_defconfig arm aspeed_g4_defconfig arm imx_v4_v5_defconfig nios2 3c120_defconfig arm mxs_defconfig arm mps2_defconfig arm lpc18xx_defconfig powerpc amigaone_defconfig um x86_64_defconfig arm multi_v4t_defconfig mips xway_defconfig sh ap325rxa_defconfig h8300 h8300h-sim_defconfig arm pxa910_defconfig powerpc iss476-smp_defconfig nds32 allnoconfig csky alldefconfig arm ixp4xx_defconfig openrisc simple_smp_defconfig arm simpad_defconfig arm mmp2_defconfig arm mv78xx0_defconfig powerpc currituck_defconfig um alldefconfig ia64 allmodconfig sh sh7770_generic_defconfig mips rb532_defconfig arm h5000_defconfig arm neponset_defconfig arm corgi_defconfig nios2 10m50_defconfig mips rs90_defconfig sh apsh4ad0a_defconfig sh edosk7705_defconfig powerpc mpc836x_rdk_defconfig mips mtx1_defconfig powerpc cm5200_defconfig powerpc acadia_defconfig sh sh7724_generic_defconfig powerpc kmeter1_defconfig arc vdk_hs38_defconfig sh landisk_defconfig powerpc katmai_defconfig mips nlm_xlp_defconfig sh edosk7760_defconfig mips malta_qemu_32r6_defconfig sh espt_defconfig sh se7712_defconfig arc alldefconfig arc nsimosci_defconfig powerpc tqm8xx_defconfig powerpc bluestone_defconfig arc hsdk_defconfig sh allmodconfig openrisc defconfig powerpc arches_defconfig powerpc ppc64_defconfig powerpc tqm8555_defconfig arm pxa168_defconfig m68k defconfig openrisc alldefconfig powerpc mpc83xx_defconfig sh ecovec24-romimage_defconfig powerpc asp8347_defconfig s390 alldefconfig powerpc tqm8548_defconfig arm axm55xx_defconfig powerpc ep88xc_defconfig sh rsk7269_defconfig sh se7751_defconfig arm s3c6400_defconfig arm dove_defconfig arc axs101_defconfig arm aspeed_g5_defconfig arc nsim_700_defconfig sh dreamcast_defconfig arm trizeps4_defconfig arm64 alldefconfig arm stm32_defconfig sh se7780_defconfig sh se7206_defconfig arm lubbock_defconfig powerpc cell_defconfig arm zeus_defconfig powerpc storcenter_defconfig arm footbridge_defconfig powerpc lite5200b_defconfig mips loongson1c_defconfig arm tegra_defconfig powerpc mpc836x_mds_defconfig mips capcella_defconfig sparc sparc64_defconfig arm am200epdkit_defconfig sh se7721_defconfig parisc generic-64bit_defconfig powerpc eiger_defconfig sparc sparc32_defconfig mips ip22_defconfig powerpc pq2fads_defconfig sh alldefconfig sh sh03_defconfig arc defconfig arm shmobile_defconfig arm pleb_defconfig powerpc mpc834x_itxgp_defconfig sparc defconfig powerpc ep8248e_defconfig powerpc bamboo_defconfig riscv rv32_defconfig arm spear6xx_defconfig powerpc rainier_defconfig xtensa cadence_csp_defconfig riscv nommu_k210_defconfig arm mvebu_v5_defconfig mips bcm63xx_defconfig m68k amiga_defconfig openrisc or1klitex_defconfig powerpc ppc6xx_defconfig mips maltasmvp_defconfig mips maltaup_xpa_defconfig powerpc redwood_defconfig powerpc pseries_defconfig m68k mac_defconfig sh sh7757lcr_defconfig mips cu1830-neo_defconfig sh sh7710voipgw_defconfig powerpc holly_defconfig arc nsimosci_hs_defconfig arm vt8500_v6_v7_defconfig arm qcom_defconfig sh r7785rp_defconfig arm cerfcube_defconfig mips loongson2k_defconfig mips ci20_defconfig arm randconfig-c002-20211103 arm randconfig-c002-20211104 arm randconfig-c002-20211105 ia64 defconfig ia64 allyesconfig m68k allyesconfig m68k allmodconfig nios2 defconfig arc allyesconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig xtensa allyesconfig s390 defconfig parisc defconfig s390 allyesconfig s390 allmodconfig i386 allyesconfig sparc allyesconfig i386 defconfig i386 debian-10.3 mips allyesconfig mips allmodconfig powerpc allnoconfig powerpc allyesconfig powerpc allmodconfig x86_64 randconfig-a004-20211104 x86_64 randconfig-a006-20211104 x86_64 randconfig-a001-20211104 x86_64 randconfig-a002-20211104 x86_64 randconfig-a003-20211104 x86_64 randconfig-a005-20211104 i386 randconfig-a005-20211104 i386 randconfig-a001-20211104 i386 randconfig-a003-20211104 i386 randconfig-a004-20211104 i386 randconfig-a006-20211104 i386 randconfig-a002-20211104 x86_64 randconfig-a012-20211103 x86_64 randconfig-a015-20211103 x86_64 randconfig-a016-20211103 x86_64 randconfig-a011-20211103 x86_64 randconfig-a013-20211103 x86_64 randconfig-a014-20211103 i386 randconfig-a014-20211103 i386 randconfig-a016-20211103 i386 randconfig-a013-20211103 i386 randconfig-a015-20211103 i386 randconfig-a011-20211103 i386 randconfig-a012-20211103 arc randconfig-r043-20211103 riscv randconfig-r042-20211103 s390 randconfig-r044-20211103 riscv nommu_virt_defconfig riscv defconfig riscv allyesconfig riscv allmodconfig x86_64 rhel-8.3-kselftests um i386_defconfig x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 allyesconfig clang tested configs: mips randconfig-c004-20211104 i386 randconfig-c001-20211104 arm randconfig-c002-20211104 s390 randconfig-c005-20211104 riscv randconfig-c006-20211104 powerpc randconfig-c003-20211104 x86_64 randconfig-c007-20211104 mips randconfig-c004-20211105 i386 randconfig-c001-20211105 arm randconfig-c002-20211105 s390 randconfig-c005-20211105 riscv randconfig-c006-20211105 powerpc randconfig-c003-20211105 x86_64 randconfig-c007-20211105 mips randconfig-c004-20211103 arm randconfig-c002-20211103 i386 randconfig-c001-20211103 s390 randconfig-c005-20211103 powerpc randconfig-c003-20211103 riscv randconfig-c006-20211103 x86_64 randconfig-c007-20211103 x86_64 randconfig-a006-20211103 x86_64 randconfig-a004-20211103 x86_64 randconfig-a001-20211103 x86_64 randconfig-a002-20211103 x86_64 randconfig-a005-20211103 x86_64 randconfig-a003-20211103 i386 randconfig-a005-20211103 i386 randconfig-a003-20211103 i386 randconfig-a001-20211103 i386 randconfig-a004-20211103 i386 randconfig-a006-20211103 i386 randconfig-a002-20211103 x86_64 randconfig-a012-20211104 x86_64 randconfig-a016-20211104 x86_64 randconfig-a015-20211104 x86_64 randconfig-a013-20211104 x86_64 randconfig-a011-20211104 x86_64 randconfig-a014-20211104 i386 randconfig-a016-20211104 i386 randconfig-a014-20211104 i386 randconfig-a015-20211104 i386 randconfig-a013-20211104 i386 randconfig-a011-20211104 i386 randconfig-a012-20211104 hexagon randconfig-r041-20211104 riscv randconfig-r042-20211104 s390 randconfig-r044-20211104 hexagon randconfig-r045-20211104 hexagon randconfig-r041-20211103 hexagon randconfig-r045-20211103 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From lkp at intel.com Fri Nov 5 04:00:49 2021 From: lkp at intel.com (kernel test robot) Date: Fri, 05 Nov 2021 12:00:49 +0800 Subject: [Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS 581e1cbfdda9ddcb87ba8d7952a7d38bf4fb9377 Message-ID: <6184ac71.nAiqTdhc3YNfrv0B%lkp@intel.com> tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue branch HEAD: 581e1cbfdda9ddcb87ba8d7952a7d38bf4fb9377 iavf: Restore non MAC filters after link down elapsed time: 1756m configs tested: 257 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64 allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig i386 randconfig-c001-20211103 i386 randconfig-c001-20211104 i386 randconfig-c001-20211105 powerpc randconfig-c003-20211104 powerpc motionpro_defconfig ia64 generic_defconfig powerpc tqm8560_defconfig mips gcw0_defconfig powerpc walnut_defconfig mips cu1000-neo_defconfig m68k bvme6000_defconfig parisc allyesconfig powerpc sam440ep_defconfig sh kfr2r09-romimage_defconfig mips bmips_stb_defconfig xtensa audio_kc705_defconfig arm spear13xx_defconfig powerpc mpc8315_rdb_defconfig arm bcm2835_defconfig sh kfr2r09_defconfig powerpc obs600_defconfig powerpc canyonlands_defconfig arm gemini_defconfig powerpc g5_defconfig arm lpc32xx_defconfig arm collie_defconfig arm at91_dt_defconfig m68k m5208evb_defconfig powerpc fsp2_defconfig arm colibri_pxa270_defconfig sh sh7785lcr_32bit_defconfig m68k atari_defconfig m68k mac_defconfig m68k m5475evb_defconfig mips loongson1b_defconfig m68k amcore_defconfig powerpc adder875_defconfig powerpc mpc832x_rdb_defconfig sh secureedge5410_defconfig microblaze mmu_defconfig powerpc ppa8548_defconfig arm sunxi_defconfig nios2 alldefconfig mips fuloong2e_defconfig powerpc mpc512x_defconfig arm oxnas_v6_defconfig arm aspeed_g4_defconfig arm imx_v4_v5_defconfig nios2 3c120_defconfig arm mxs_defconfig arm mps2_defconfig mips xway_defconfig nds32 allnoconfig csky alldefconfig arm ixp4xx_defconfig openrisc simple_smp_defconfig arm simpad_defconfig arm mmp2_defconfig arm mv78xx0_defconfig powerpc currituck_defconfig um alldefconfig arm corgi_defconfig nios2 10m50_defconfig mips rs90_defconfig sh apsh4ad0a_defconfig sh edosk7705_defconfig powerpc amigaone_defconfig sh sh7724_generic_defconfig powerpc kmeter1_defconfig arc vdk_hs38_defconfig sh landisk_defconfig powerpc mgcoge_defconfig powerpc katmai_defconfig mips nlm_xlp_defconfig sh edosk7760_defconfig mips malta_qemu_32r6_defconfig sh espt_defconfig sh se7712_defconfig arc alldefconfig arc nsimosci_defconfig powerpc tqm8xx_defconfig powerpc bluestone_defconfig arc hsdk_defconfig mips qi_lb60_defconfig powerpc ppc64_defconfig powerpc tqm8555_defconfig mips rb532_defconfig m68k defconfig openrisc alldefconfig powerpc mpc83xx_defconfig arm orion5x_defconfig sh ecovec24-romimage_defconfig powerpc asp8347_defconfig s390 alldefconfig powerpc tqm8548_defconfig arm axm55xx_defconfig powerpc ep88xc_defconfig sh rsk7269_defconfig sh se7751_defconfig arm s3c6400_defconfig arm dove_defconfig arc axs101_defconfig arm aspeed_g5_defconfig arc nsim_700_defconfig arm multi_v4t_defconfig sh dreamcast_defconfig arm trizeps4_defconfig powerpc akebono_defconfig mips tb0287_defconfig m68k alldefconfig mips mtx1_defconfig powerpc ppc40x_defconfig arm zeus_defconfig powerpc storcenter_defconfig arm footbridge_defconfig powerpc lite5200b_defconfig mips loongson1c_defconfig powerpc acadia_defconfig arm tegra_defconfig powerpc mpc836x_mds_defconfig parisc generic-64bit_defconfig sh sh7770_generic_defconfig powerpc eiger_defconfig sparc sparc32_defconfig mips ip22_defconfig powerpc pq2fads_defconfig sh alldefconfig sh sh03_defconfig riscv allnoconfig arc defconfig arm shmobile_defconfig arm pleb_defconfig arm spear6xx_defconfig powerpc rainier_defconfig xtensa cadence_csp_defconfig mips bcm63xx_defconfig m68k amiga_defconfig arm64 alldefconfig h8300 h8300h-sim_defconfig sh se7721_defconfig powerpc redwood_defconfig powerpc pseries_defconfig sh sh7785lcr_defconfig sh sh7757lcr_defconfig mips cu1830-neo_defconfig arm pxa168_defconfig sh sh7710voipgw_defconfig riscv nommu_k210_defconfig powerpc holly_defconfig powerpc sequoia_defconfig arc nsimosci_hs_defconfig arm vt8500_v6_v7_defconfig arm qcom_defconfig sh r7785rp_defconfig arm cerfcube_defconfig mips maltasmvp_defconfig arm randconfig-c002-20211104 arm randconfig-c002-20211105 arm randconfig-c002-20211103 ia64 allmodconfig ia64 defconfig ia64 allyesconfig m68k allmodconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 defconfig csky defconfig alpha defconfig alpha allyesconfig nios2 allyesconfig h8300 allyesconfig sh allmodconfig xtensa allyesconfig s390 defconfig parisc defconfig s390 allyesconfig s390 allmodconfig sparc allyesconfig sparc defconfig i386 defconfig i386 debian-10.3 i386 allyesconfig mips allyesconfig mips allmodconfig powerpc allnoconfig powerpc allyesconfig powerpc allmodconfig x86_64 randconfig-a004-20211104 x86_64 randconfig-a006-20211104 x86_64 randconfig-a001-20211104 x86_64 randconfig-a002-20211104 x86_64 randconfig-a003-20211104 x86_64 randconfig-a005-20211104 i386 randconfig-a005-20211104 i386 randconfig-a001-20211104 i386 randconfig-a003-20211104 i386 randconfig-a004-20211104 i386 randconfig-a006-20211104 i386 randconfig-a002-20211104 i386 randconfig-a014-20211103 i386 randconfig-a016-20211103 i386 randconfig-a013-20211103 i386 randconfig-a015-20211103 i386 randconfig-a011-20211103 i386 randconfig-a012-20211103 riscv nommu_virt_defconfig riscv rv32_defconfig riscv defconfig riscv allmodconfig riscv allyesconfig x86_64 rhel-8.3-kselftests um x86_64_defconfig um i386_defconfig x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-func x86_64 kexec x86_64 allyesconfig clang tested configs: mips randconfig-c004-20211104 i386 randconfig-c001-20211104 arm randconfig-c002-20211104 s390 randconfig-c005-20211104 riscv randconfig-c006-20211104 powerpc randconfig-c003-20211104 x86_64 randconfig-c007-20211104 mips randconfig-c004-20211105 i386 randconfig-c001-20211105 arm randconfig-c002-20211105 s390 randconfig-c005-20211105 riscv randconfig-c006-20211105 powerpc randconfig-c003-20211105 x86_64 randconfig-c007-20211105 i386 randconfig-a005-20211103 i386 randconfig-a003-20211103 i386 randconfig-a001-20211103 i386 randconfig-a004-20211103 i386 randconfig-a006-20211103 i386 randconfig-a002-20211103 x86_64 randconfig-a012-20211104 x86_64 randconfig-a016-20211104 x86_64 randconfig-a015-20211104 x86_64 randconfig-a013-20211104 x86_64 randconfig-a011-20211104 x86_64 randconfig-a014-20211104 i386 randconfig-a016-20211104 i386 randconfig-a014-20211104 i386 randconfig-a015-20211104 i386 randconfig-a013-20211104 i386 randconfig-a011-20211104 i386 randconfig-a012-20211104 hexagon randconfig-r041-20211104 riscv randconfig-r042-20211104 s390 randconfig-r044-20211104 hexagon randconfig-r045-20211104 hexagon randconfig-r041-20211103 hexagon randconfig-r045-20211103 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all at lists.01.org From gurucharanx.g at intel.com Fri Nov 5 09:10:01 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Fri, 5 Nov 2021 09:10:01 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1 1/4] ice: update to newer kernel API In-Reply-To: <20211026000826.156803-2-jesse.brandeburg@intel.com> References: <20211026000826.156803-1-jesse.brandeburg@intel.com> <20211026000826.156803-2-jesse.brandeburg@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Jesse > Brandeburg > Sent: Tuesday, October 26, 2021 5:38 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next v1 1/4] ice: update to newer kernel > API > > Use the netif_tx_* API from netdevice.h which has simpler parameters. > > Signed-off-by: Jesse Brandeburg > --- > Testing Hints: test transmit performance and queue start/stop tests which > increment tx_restart counter. > --- > drivers/net/ethernet/intel/ice/ice_txrx.c | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Fri Nov 5 09:10:39 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Fri, 5 Nov 2021 09:10:39 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1 3/4] ice: tighter control over VSI_DOWN state In-Reply-To: <20211026000826.156803-4-jesse.brandeburg@intel.com> References: <20211026000826.156803-1-jesse.brandeburg@intel.com> <20211026000826.156803-4-jesse.brandeburg@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Jesse > Brandeburg > Sent: Tuesday, October 26, 2021 5:38 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next v1 3/4] ice: tighter control over > VSI_DOWN state > > The driver had comments to the effect of: This flag should be set before calling > this function. While reviewing code it was found that there were several > violations of this policy, which could introduce hard to find bugs or races. > > Fix the violations of the "VSI DOWN state must be set before calling ice_down" > and make checking the state into code with a WARN_ON. > > Signed-off-by: Jesse Brandeburg > --- > Testing Hints (Required if no HSD): legacy-rx private flag disable/enable forgot > to set this previously and is a way to trigger the down/up path. > --- > drivers/net/ethernet/intel/ice/ice_ethtool.c | 6 ++++-- > drivers/net/ethernet/intel/ice/ice_main.c | 7 ++++--- > 2 files changed, 8 insertions(+), 5 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Fri Nov 5 09:11:31 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Fri, 5 Nov 2021 09:11:31 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1 4/4] ice: use modern kernel API for kick In-Reply-To: <20211026000826.156803-5-jesse.brandeburg@intel.com> References: <20211026000826.156803-1-jesse.brandeburg@intel.com> <20211026000826.156803-5-jesse.brandeburg@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Jesse > Brandeburg > Sent: Tuesday, October 26, 2021 5:38 AM > To: intel-wired-lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next v1 4/4] ice: use modern kernel API > for kick > > The kernel gained a new interface for drivers to use to combine tail bump > (doorbell) and BQL updates, attempt to use those new interfaces. > > Signed-off-by: Jesse Brandeburg > --- > drivers/net/ethernet/intel/ice/ice_txrx.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From gurucharanx.g at intel.com Fri Nov 5 09:12:28 2021 From: gurucharanx.g at intel.com (G, GurucharanX) Date: Fri, 5 Nov 2021 09:12:28 +0000 Subject: [Intel-wired-lan] [PATCH net-next v1 2/4] ice: use prefetch methods In-Reply-To: <20211027193836.372561-1-jesse.brandeburg@intel.com> References: <20211023004128.86999-1-jesse.brandeburg@intel.com> <20211027193836.372561-1-jesse.brandeburg@intel.com> Message-ID: > -----Original Message----- > From: Intel-wired-lan On Behalf Of Jesse > Brandeburg > Sent: Thursday, October 28, 2021 1:09 AM > To: Nguyen, Anthony L ; intel-wired- > lan at lists.osuosl.org > Subject: [Intel-wired-lan] [PATCH net-next v1 2/4] ice: use prefetch methods > > The kernel provides some prefetch mechanisms to speed up commonly cold > cache line accesses during receive processing. Since these are software > structures it helps to have these strategically placed prefetches. > > Be careful to call BQL prefetch complete only for non XDP queues. > > Co-developed-by: Piotr Raczynski > Signed-off-by: Piotr Raczynski > Signed-off-by: Jesse Brandeburg > --- > Testing Hints: > Run AF_XDP socket and then terminate it or run xdp2 sample and send some > traffic into the port. > > Performance numbers for xdp2 sample are not noticeably affected by > introducing branch from this patch. > --- > drivers/net/ethernet/intel/ice/ice_txrx.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > Tested-by: Gurucharan G (A Contingent worker at Intel) From jedrzej.jagielski at intel.com Fri Nov 5 11:12:03 2021 From: jedrzej.jagielski at intel.com (Jagielski, Jedrzej) Date: Fri, 5 Nov 2021 11:12:03 +0000 Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum queues is exceeded In-Reply-To: <2e3f1249-a62e-3829-a17b-46284174dc29@molgen.mpg.de> References: <20210823114344.7058-1-jedrzej.jagielski@intel.com> <2e3f1249-a62e-3829-a17b-46284174dc29@molgen.mpg.de> Message-ID: Dear Paul, thank you for your suggestions. >Dear Jaroslow, dear Jedrzej, > > >On 23.08.21 13:43, Jedrzej Jagielski wrote: > >Maybe use: > >i40e: Handle case of depleted Is the title of the patch connected to the mailing thread? I am afraid that if I change the title the mailing thread won't be coherent. > >> Before this patch VF interface vanished when maximum queue >> number was exceeded. Driver tried to add next queues even >> if there was not enough space. PF sent incorrect number of >> queues to the VF when there were not enough of them. >> >> Add an additional condition introduced to check >> available space in 'qp_pile' before proceeding. >> Also add the search for free space in PF queue pair piles. > >Please reflow for 75 characters per line. > >How is the new search better? > >> Without this patch VF interfaces are not seen when available >> space for queues has been exceeded and following logs appears >> permanently in dmesg: >> "Unable to get VF config (-32)". >> "VF 62 failed opcode 3, retval: -5" >> "Unable to get VF config due to PF error condition, not retrying" > >Please add the new logs. What logs do you mean? > >> Fixes: 7daa6bf3294e ("i40e: driver core headers") >> Fixes: 41c445ff0f48 ("i40e: main driver core") >> Signed-off-by: Jaroslaw Gawin >> Signed-off-by: Jedrzej Jagielski >> --- >> drivers/net/ethernet/intel/i40e/i40e.h | 2 +- >> drivers/net/ethernet/intel/i40e/i40e_main.c | 49 +++++++++++---- >> .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 59 +++++++++++++++++++ >> 3 files changed, 96 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h >> index b10bc59c5700..fdfa96ece5f3 100644 >> --- a/drivers/net/ethernet/intel/i40e/i40e.h >> +++ b/drivers/net/ethernet/intel/i40e/i40e.h >> @@ -174,7 +174,6 @@ enum i40e_interrupt_policy { >> >> struct i40e_lump_tracking { >> u16 num_entries; >> - u16 search_hint; >> u16 list[0]; >> #define I40E_PILE_VALID_BIT 0x8000 >> #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) >> @@ -1156,6 +1155,7 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); >> struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, >> u16 downlink_seid, u8 enabled_tc); >> void i40e_veb_release(struct i40e_veb *veb); >> +int i40e_max_lump_qp(struct i40e_pf *pf); >> >> int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); >> int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); >> diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c >> index 000991afcf27..32382d4a90e7 100644 >> --- a/drivers/net/ethernet/intel/i40e/i40e_main.c >> +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c >> @@ -178,16 +178,12 @@ int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) >> * @id: an owner id to stick on the items assigned >> * >> * Returns the base item index of the lump, or negative for error >> - * >> - * The search_hint trick and lack of advanced fit-finding only work >> - * because we're highly likely to have all the same size lump requests. >> - * Linear search time and any fragmentation should be minimal. >> **/ >> static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, >> u16 needed, u16 id) >> { >> int ret = -ENOMEM; >> - int i, j; >> + u16 i, j; > >Please do not mix these changes into the patch. Additionally, using the >native variable types does not harm. > >> if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { >> dev_info(&pf->pdev->dev, >> @@ -196,8 +192,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, >> return -EINVAL; >> } >> >> - /* start the linear search with an imperfect hint */ >> - i = pile->search_hint; >> + i = 0; >> while (i < pile->num_entries) { >> /* skip already allocated entries */ >> if (pile->list[i] & I40E_PILE_VALID_BIT) { >> @@ -216,7 +211,6 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, >> for (j = 0; j < needed; j++) >> pile->list[i+j] = id | I40E_PILE_VALID_BIT; >> ret = i; >> - pile->search_hint = i + j; >> break; >> } >> >> @@ -239,7 +233,7 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) >> { >> int valid_id = (id | I40E_PILE_VALID_BIT); >> int count = 0; >> - int i; >> + u16 i; >> >> if (!pile || index >= pile->num_entries) >> return -EINVAL; >> @@ -251,12 +245,43 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) >> count++; >> } >> >> - if (count && index < pile->search_hint) >> - pile->search_hint = index; >> >> return count; >> } >> >> +/** >> + * i40e_max_lump_qp - find a biggest size of lump available in qp_pile >> + * @pf: pointer to private device data structure >> + * >> + * Returns the max size of lump in a qp_pile, or negative for error >> + */ >> +int i40e_max_lump_qp(struct i40e_pf *pf) >> +{ >> + struct i40e_lump_tracking *pile = pf->qp_pile; >> + int pool_size, max_size; >> + u16 i; > >unsigned int i; > >> + >> + if (!pile) { >> + dev_info(&pf->pdev->dev, >> + "param err: pile=%s\n", >> + pile ? "" : ""); >> + return -EINVAL; >> + } >> + >> + pool_size = 0; >> + max_size = 0; >> + for (i = 0; i < pile->num_entries; i++) { >> + if (pile->list[i] & I40E_PILE_VALID_BIT) { >> + pool_size = 0; >> + continue; >> + } >> + if (max_size < ++pool_size) >> + max_size = pool_size; > >Maybe in one line: max_size = max(max_size, ++pool_size); > >> + } >> + >> + return max_size; >> +} >> + >> /** >> * i40e_find_vsi_from_id - searches for the vsi with the given id >> * @pf: the pf structure to search for the vsi >> @@ -11753,7 +11778,6 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf) >> return -ENOMEM; >> >> pf->irq_pile->num_entries = vectors; >> - pf->irq_pile->search_hint = 0; >> >> /* track first vector for misc interrupts, ignore return */ >> (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); >> @@ -12556,7 +12580,6 @@ static int i40e_sw_init(struct i40e_pf *pf) >> goto sw_init_done; >> } >> pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; >> - pf->qp_pile->search_hint = 0; >> >> pf->tx_timeout_recovery_level = 1; >> >> diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c >> index c007fba3d1dd..5a488ce5451b 100644 >> --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c >> +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c >> @@ -2616,6 +2616,59 @@ error_param: >> aq_ret); >> } >> >> +/** >> + * i40e_check_enough_queue - find enough queue > >find big enough queue? >find big enough queue size? > >> + * @vf: pointer to the VF info >> + * @needed: the number of items needed >> + * >> + * Returns the base item index of the queue, or negative for error >> + **/ >> +static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed) >> +{ >> + u16 i, cur_queues, more, pool_size; > >`unsigned int` or `size_t` where possible. > >> + struct i40e_lump_tracking *pile; >> + struct i40e_pf *pf = vf->pf; >> + struct i40e_vsi *vsi; >> + >> + vsi = pf->vsi[vf->lan_vsi_idx]; >> + cur_queues = vsi->alloc_queue_pairs; >> + >> + /* if current allocated queues is enough for need */ >> + if (cur_queues >= needed) >> + return vsi->base_queue; >> + >> + pile = pf->qp_pile; >> + if (cur_queues > 0) { >> + /* if queues of allocated not zero, just check if > >Please improve the wording. > >> + * there is enough queues behind the allocated queues > >s/is/are/ > >> + * for more. >> + */ >> + more = needed - cur_queues; >> + for (i = vsi->base_queue + cur_queues; >> + i < pile->num_entries; i++) { >> + if (pile->list[i] & I40E_PILE_VALID_BIT) >> + break; >> + >> + if (more-- == 1) >> + /* there is enough */ >> + return vsi->base_queue; >> + } >> + } >> + >> + pool_size = 0; >> + for (i = 0; i < pile->num_entries; i++) { >> + if (pile->list[i] & I40E_PILE_VALID_BIT) { >> + pool_size = 0; >> + continue; >> + } >> + if (needed <= ++pool_size) >> + /* there is enough */ >> + return i; >> + } >> + >> + return -ENOMEM; >> +} >> + >> /** >> * i40e_vc_request_queues_msg >> * @vf: pointer to the VF info >> @@ -2650,6 +2703,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg) >> req_pairs - cur_pairs, >> pf->queues_left); >> vfres->num_queue_pairs = pf->queues_left + cur_pairs; >> + } else if (i40e_check_enough_queue(vf, req_pairs) < 0) { >> + dev_warn(&pf->pdev->dev, >> + "VF %d requested %d more queues, but there is not enough for it.\n", >> + vf->vf_id, >> + req_pairs - cur_pairs); >> + vfres->num_queue_pairs = cur_pairs; >> } else { >> /* successful request */ >> vf->num_req_queues = req_pairs; >> > Every single suggestion about the code from above will be adopted in the next patch. > >Kind regards, > >Paul Best regards, Jedrzej -----Original Message----- From: Paul Menzel Sent: czwartek, 4 listopada 2021 00:10 To: Jagielski, Jedrzej ; Gawin, JaroslawX Cc: intel-wired-lan at lists.osuosl.org Subject: Re: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum queues is exceeded Dear Jaroslow, dear Jedrzej, On 23.08.21 13:43, Jedrzej Jagielski wrote: Maybe use: i40e: Handle case of depleted > Before this patch VF interface vanished when maximum queue > number was exceeded. Driver tried to add next queues even > if there was not enough space. PF sent incorrect number of > queues to the VF when there were not enough of them. > > Add an additional condition introduced to check > available space in 'qp_pile' before proceeding. > Also add the search for free space in PF queue pair piles. Please reflow for 75 characters per line. How is the new search better? > Without this patch VF interfaces are not seen when available > space for queues has been exceeded and following logs appears > permanently in dmesg: > "Unable to get VF config (-32)". > "VF 62 failed opcode 3, retval: -5" > "Unable to get VF config due to PF error condition, not retrying" Please add the new logs. > Fixes: 7daa6bf3294e ("i40e: driver core headers") > Fixes: 41c445ff0f48 ("i40e: main driver core") > Signed-off-by: Jaroslaw Gawin > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/i40e/i40e.h | 2 +- > drivers/net/ethernet/intel/i40e/i40e_main.c | 49 +++++++++++---- > .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 59 +++++++++++++++++++ > 3 files changed, 96 insertions(+), 14 deletions(-) > > diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h > index b10bc59c5700..fdfa96ece5f3 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e.h > +++ b/drivers/net/ethernet/intel/i40e/i40e.h > @@ -174,7 +174,6 @@ enum i40e_interrupt_policy { > > struct i40e_lump_tracking { > u16 num_entries; > - u16 search_hint; > u16 list[0]; > #define I40E_PILE_VALID_BIT 0x8000 > #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) > @@ -1156,6 +1155,7 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); > struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, > u16 downlink_seid, u8 enabled_tc); > void i40e_veb_release(struct i40e_veb *veb); > +int i40e_max_lump_qp(struct i40e_pf *pf); > > int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); > int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); > diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c > index 000991afcf27..32382d4a90e7 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e_main.c > +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c > @@ -178,16 +178,12 @@ int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) > * @id: an owner id to stick on the items assigned > * > * Returns the base item index of the lump, or negative for error > - * > - * The search_hint trick and lack of advanced fit-finding only work > - * because we're highly likely to have all the same size lump requests. > - * Linear search time and any fragmentation should be minimal. > **/ > static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > u16 needed, u16 id) > { > int ret = -ENOMEM; > - int i, j; > + u16 i, j; Please do not mix these changes into the patch. Additionally, using the native variable types does not harm. > if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { > dev_info(&pf->pdev->dev, > @@ -196,8 +192,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > return -EINVAL; > } > > - /* start the linear search with an imperfect hint */ > - i = pile->search_hint; > + i = 0; > while (i < pile->num_entries) { > /* skip already allocated entries */ > if (pile->list[i] & I40E_PILE_VALID_BIT) { > @@ -216,7 +211,6 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, > for (j = 0; j < needed; j++) > pile->list[i+j] = id | I40E_PILE_VALID_BIT; > ret = i; > - pile->search_hint = i + j; > break; > } > > @@ -239,7 +233,7 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) > { > int valid_id = (id | I40E_PILE_VALID_BIT); > int count = 0; > - int i; > + u16 i; > > if (!pile || index >= pile->num_entries) > return -EINVAL; > @@ -251,12 +245,43 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) > count++; > } > > - if (count && index < pile->search_hint) > - pile->search_hint = index; > > return count; > } > > +/** > + * i40e_max_lump_qp - find a biggest size of lump available in qp_pile > + * @pf: pointer to private device data structure > + * > + * Returns the max size of lump in a qp_pile, or negative for error > + */ > +int i40e_max_lump_qp(struct i40e_pf *pf) > +{ > + struct i40e_lump_tracking *pile = pf->qp_pile; > + int pool_size, max_size; > + u16 i; unsigned int i; > + > + if (!pile) { > + dev_info(&pf->pdev->dev, > + "param err: pile=%s\n", > + pile ? "" : ""); > + return -EINVAL; > + } > + > + pool_size = 0; > + max_size = 0; > + for (i = 0; i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) { > + pool_size = 0; > + continue; > + } > + if (max_size < ++pool_size) > + max_size = pool_size; Maybe in one line: max_size = max(max_size, ++pool_size); > + } > + > + return max_size; > +} > + > /** > * i40e_find_vsi_from_id - searches for the vsi with the given id > * @pf: the pf structure to search for the vsi > @@ -11753,7 +11778,6 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf) > return -ENOMEM; > > pf->irq_pile->num_entries = vectors; > - pf->irq_pile->search_hint = 0; > > /* track first vector for misc interrupts, ignore return */ > (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); > @@ -12556,7 +12580,6 @@ static int i40e_sw_init(struct i40e_pf *pf) > goto sw_init_done; > } > pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; > - pf->qp_pile->search_hint = 0; > > pf->tx_timeout_recovery_level = 1; > > diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > index c007fba3d1dd..5a488ce5451b 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c > @@ -2616,6 +2616,59 @@ error_param: > aq_ret); > } > > +/** > + * i40e_check_enough_queue - find enough queue find big enough queue? find big enough queue size? > + * @vf: pointer to the VF info > + * @needed: the number of items needed > + * > + * Returns the base item index of the queue, or negative for error > + **/ > +static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed) > +{ > + u16 i, cur_queues, more, pool_size; `unsigned int` or `size_t` where possible. > + struct i40e_lump_tracking *pile; > + struct i40e_pf *pf = vf->pf; > + struct i40e_vsi *vsi; > + > + vsi = pf->vsi[vf->lan_vsi_idx]; > + cur_queues = vsi->alloc_queue_pairs; > + > + /* if current allocated queues is enough for need */ > + if (cur_queues >= needed) > + return vsi->base_queue; > + > + pile = pf->qp_pile; > + if (cur_queues > 0) { > + /* if queues of allocated not zero, just check if Please improve the wording. > + * there is enough queues behind the allocated queues s/is/are/ > + * for more. > + */ > + more = needed - cur_queues; > + for (i = vsi->base_queue + cur_queues; > + i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) > + break; > + > + if (more-- == 1) > + /* there is enough */ > + return vsi->base_queue; > + } > + } > + > + pool_size = 0; > + for (i = 0; i < pile->num_entries; i++) { > + if (pile->list[i] & I40E_PILE_VALID_BIT) { > + pool_size = 0; > + continue; > + } > + if (needed <= ++pool_size) > + /* there is enough */ > + return i; > + } > + > + return -ENOMEM; > +} > + > /** > * i40e_vc_request_queues_msg > * @vf: pointer to the VF info > @@ -2650,6 +2703,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg) > req_pairs - cur_pairs, > pf->queues_left); > vfres->num_queue_pairs = pf->queues_left + cur_pairs; > + } else if (i40e_check_enough_queue(vf, req_pairs) < 0) { > + dev_warn(&pf->pdev->dev, > + "VF %d requested %d more queues, but there is not enough for it.\n", > + vf->vf_id, > + req_pairs - cur_pairs); > + vfres->num_queue_pairs = cur_pairs; > } else { > /* successful request */ > vf->num_req_queues = req_pairs; > Kind regards, Paul From jedrzej.jagielski at intel.com Fri Nov 5 11:17:00 2021 From: jedrzej.jagielski at intel.com (Jedrzej Jagielski) Date: Fri, 5 Nov 2021 11:17:00 +0000 Subject: [Intel-wired-lan] [PATCH net v2] i40e: Fix issue when maximum queues is exceeded Message-ID: <20211105111700.204333-1-jedrzej.jagielski@intel.com> Before this patch VF interface vanished when maximum queue number was exceeded. Driver tried to add next queues even if there was not enough space. PF sent incorrect number of queues to the VF when there were not enough of them. Add an additional condition introduced to check available space in 'qp_pile' before proceeding. This condition makes it impossible to add queues if they number is greater than the number resulting from available space. Also add the search for free space in PF queue pair piles. Without this patch VF interfaces are not seen when available space for queues has been exceeded and following logs appears permanently in dmesg: "Unable to get VF config (-32)". "VF 62 failed opcode 3, retval: -5" "Unable to get VF config due to PF error condition, not retrying" --- V2: little tweaks in commit msg and changes in the code including: change from u16 type to unsigned int, comments change and line reduction --- Fixes: 7daa6bf3294e ("i40e: driver core headers") Fixes: 41c445ff0f48 ("i40e: main driver core") Signed-off-by: Jaroslaw Gawin Signed-off-by: Slawomir Laba Signed-off-by: Jedrzej Jagielski --- drivers/net/ethernet/intel/i40e/i40e.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 46 +++++++++++---- .../ethernet/intel/i40e/i40e_virtchnl_pf.c | 59 +++++++++++++++++++ 3 files changed, 94 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h index d7db443abeaf..88883724c575 100644 --- a/drivers/net/ethernet/intel/i40e/i40e.h +++ b/drivers/net/ethernet/intel/i40e/i40e.h @@ -174,7 +174,6 @@ enum i40e_interrupt_policy { struct i40e_lump_tracking { u16 num_entries; - u16 search_hint; u16 list[0]; #define I40E_PILE_VALID_BIT 0x8000 #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) @@ -1156,6 +1155,7 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, u16 downlink_seid, u8 enabled_tc); void i40e_veb_release(struct i40e_veb *veb); +int i40e_max_lump_qp(struct i40e_pf *pf); int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c index cf1aa610c08e..85760b74630c 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_main.c +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c @@ -178,10 +178,6 @@ int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) * @id: an owner id to stick on the items assigned * * Returns the base item index of the lump, or negative for error - * - * The search_hint trick and lack of advanced fit-finding only work - * because we're highly likely to have all the same size lump requests. - * Linear search time and any fragmentation should be minimal. **/ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, u16 needed, u16 id) @@ -196,8 +192,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, return -EINVAL; } - /* start the linear search with an imperfect hint */ - i = pile->search_hint; + i = 0; while (i < pile->num_entries) { /* skip already allocated entries */ if (pile->list[i] & I40E_PILE_VALID_BIT) { @@ -216,7 +211,6 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, for (j = 0; j < needed; j++) pile->list[i+j] = id | I40E_PILE_VALID_BIT; ret = i; - pile->search_hint = i + j; break; } @@ -239,7 +233,7 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) { int valid_id = (id | I40E_PILE_VALID_BIT); int count = 0; - int i; + u16 i; if (!pile || index >= pile->num_entries) return -EINVAL; @@ -251,12 +245,42 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) count++; } - if (count && index < pile->search_hint) - pile->search_hint = index; return count; } +/** + * i40e_max_lump_qp - find a biggest size of lump available in qp_pile + * @pf: pointer to private device data structure + * + * Returns the max size of lump in a qp_pile, or negative for error + */ +int i40e_max_lump_qp(struct i40e_pf *pf) +{ + struct i40e_lump_tracking *pile = pf->qp_pile; + int pool_size, max_size; + unsigned int i; + + if (!pile) { + dev_info(&pf->pdev->dev, + "param err: pile=%s\n", + pile ? "" : ""); + return -EINVAL; + } + + pool_size = 0; + max_size = 0; + for (i = 0; i < pile->num_entries; i++) { + if (pile->list[i] & I40E_PILE_VALID_BIT) { + pool_size = 0; + continue; + } + max_size = max(max_size, ++pool_size); + } + + return max_size; +} + /** * i40e_find_vsi_from_id - searches for the vsi with the given id * @pf: the pf structure to search for the vsi @@ -11685,7 +11709,6 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf) return -ENOMEM; pf->irq_pile->num_entries = vectors; - pf->irq_pile->search_hint = 0; /* track first vector for misc interrupts, ignore return */ (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1); @@ -12488,7 +12511,6 @@ static int i40e_sw_init(struct i40e_pf *pf) goto sw_init_done; } pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; - pf->qp_pile->search_hint = 0; pf->tx_timeout_recovery_level = 1; diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c index 7321a8704d8f..6fbf84243287 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c @@ -2609,6 +2609,59 @@ static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg) aq_ret); } +/** + * i40e_check_enough_queue - find big enough queue number + * @vf: pointer to the VF info + * @needed: the number of items needed + * + * Returns the base item index of the queue, or negative for error + **/ +static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed) +{ + unsigned int i, cur_queues, more, pool_size; + struct i40e_lump_tracking *pile; + struct i40e_pf *pf = vf->pf; + struct i40e_vsi *vsi; + + vsi = pf->vsi[vf->lan_vsi_idx]; + cur_queues = vsi->alloc_queue_pairs; + + /* if current allocated queues are enough for need */ + if (cur_queues >= needed) + return vsi->base_queue; + + pile = pf->qp_pile; + if (cur_queues > 0) { + /* if the allocated queues are not zero + * just check if there are enough queues for more + * behind the allocated queues. + */ + more = needed - cur_queues; + for (i = vsi->base_queue + cur_queues; + i < pile->num_entries; i++) { + if (pile->list[i] & I40E_PILE_VALID_BIT) + break; + + if (more-- == 1) + /* there is enough */ + return vsi->base_queue; + } + } + + pool_size = 0; + for (i = 0; i < pile->num_entries; i++) { + if (pile->list[i] & I40E_PILE_VALID_BIT) { + pool_size = 0; + continue; + } + if (needed <= ++pool_size) + /* there is enough */ + return i; + } + + return -ENOMEM; +} + /** * i40e_vc_request_queues_msg * @vf: pointer to the VF info @@ -2643,6 +2696,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg) req_pairs - cur_pairs, pf->queues_left); vfres->num_queue_pairs = pf->queues_left + cur_pairs; + } else if (i40e_check_enough_queue(vf, req_pairs) < 0) { + dev_warn(&pf->pdev->dev, + "VF %d requested %d more queues, but there is not enough for it.\n", + vf->vf_id, + req_pairs - cur_pairs); + vfres->num_queue_pairs = cur_pairs; } else { /* successful request */ vf->num_req_queues = req_pairs; -- 2.27.0 From pmenzel at molgen.mpg.de Fri Nov 5 11:20:41 2021 From: pmenzel at molgen.mpg.de (Paul Menzel) Date: Fri, 5 Nov 2021 12:20:41 +0100 Subject: [Intel-wired-lan] [PATCH net v1] i40e: Fix issue when maximum queues is exceeded In-Reply-To: References: <20210823114344.7058-1-jedrzej.jagielski@intel.com> <2e3f1249-a62e-3829-a17b-46284174dc29@molgen.mpg.de> Message-ID: Dear Jedrzej, On 05.11.21 12:12, Jagielski, Jedrzej wrote: [?] >> On 23.08.21 13:43, Jedrzej Jagielski wrote: >> >> Maybe use: >> >> i40e: Handle case of depleted Sorry, I didn?t finish that. Maybe: i40e: Handle case of using more than available queues > Is the title of the patch connected to the mailing > thread? I am afraid that if I change the title > the mailing thread won't be coherent. Yes, that is what I meant. I guess if you tag it v2, the tooling like Patchwork might be able to figure it out. >>> Before this patch VF interface vanished when maximum queue >>> number was exceeded. Driver tried to add next queues even >>> if there was not enough space. PF sent incorrect number of >>> queues to the VF when there were not enough of them. >>> >>> Add an additional condition introduced to check >>> available space in 'qp_pile' before proceeding. >>> Also add the search for free space in PF queue pair piles. >> >> Please reflow for 75 characters per line. >> >> How is the new search better? >> >>> Without this patch VF interfaces are not seen when available >>> space for queues has been exceeded and following logs appears >>> permanently in dmesg: >>> "Unable to get VF config (-32)". >>> "VF 62 failed opcode 3, retval: -5" >>> "Unable to get VF config due to PF error condition, not retrying" >> >> Please add the new logs. > > What logs do you mean? Your patch adds: + dev_warn(&pf->pdev->dev, + "VF %d requested %d more queues, but there is not enough for it.\n", + vf->vf_id, + req_pairs - cur_pairs); [?] Kind regards, Paul From maciej.machnikowski at intel.com Fri Nov 5 11:51:48 2021 From: maciej.machnikowski at intel.com (Machnikowski, Maciej) Date: Fri, 5 Nov 2021 11:51:48 +0000 Subject: [Intel-wired-lan] [PATCH net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211104110855.3ead1642@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-7-maciej.machnikowski@intel.com> <20211104110855.3ead1642@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> Message-ID: > -----Original Message----- > From: Jakub Kicinski > Sent: Thursday, November 4, 2021 7:09 PM > To: Machnikowski, Maciej > Subject: Re: [PATCH net-next 6/6] docs: net: Add description of SyncE > interfaces > > On Thu, 4 Nov 2021 09:12:31 +0100 Maciej Machnikowski wrote: > > +Synchronous Ethernet networks use a physical layer clock to syntonize > > +the frequency across different network elements. > > + > > +Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet > > +Equipment Clock (EEC) and can recover synchronization > > +from the synchronization inputs - either traffic interfaces or external > > +frequency sources. > > +The EEC can synchronize its frequency (syntonize) to any of those > sources. > > +It is also able to select a synchronization source through priority tables > > +and synchronization status messaging. It also provides necessary > > +filtering and holdover capabilities. > > + > > +The following interface can be applicable to diffferent packet network > types > > +following ITU-T G.8261/G.8262 recommendations. > > Can we get a diagram in here in terms of how the port feeds its > recovered Rx freq into EEC and that feeds freq of Tx on other ports? Will try - yet my ASCII art skills are not very well developed :) > I'm still struggling to understand your reasoning around not making > EEC its own object. "We can do this later" seems like trading > relatively little effort now for extra work for driver and application > developers for ever. That's not the case. We need EEC and the other subsystem we wanted to make is the DPLL subsystem. While EEC can be a DPLL - it doesn't have to, and it's also the other way round - the DPLL can have numerous different usages. When we add the DPLL subsystem support the future work will be as simple as routing the EEC state read function to the DPLL subsystem. But if someone decides to use a different HW implementation he will still be able to implement his own version of API to handle it without a bigger DPLL block > Also patch 3 still has a kdoc warning. Will fix. From maciej.machnikowski at intel.com Fri Nov 5 12:17:19 2021 From: maciej.machnikowski at intel.com (Machnikowski, Maciej) Date: Fri, 5 Nov 2021 12:17:19 +0000 Subject: [Intel-wired-lan] [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered clock configuration In-Reply-To: <2d379392-a381-e60a-7658-5ac695c30df1@nvidia.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-5-maciej.machnikowski@intel.com> <2d379392-a381-e60a-7658-5ac695c30df1@nvidia.com> Message-ID: > -----Original Message----- > From: Roopa Prabhu > Sent: Thursday, November 4, 2021 7:25 PM > To: Machnikowski, Maciej ; > netdev at vger.kernel.org; intel-wired-lan at lists.osuosl.org > Cc: richardcochran at gmail.com; abyagowi at fb.com; Nguyen, Anthony L > ; davem at davemloft.net; kuba at kernel.org; > linux-kselftest at vger.kernel.org; idosch at idosch.org; mkubecek at suse.cz; > saeed at kernel.org; michael.chan at broadcom.com > Subject: Re: [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered > clock configuration > > > On 11/4/21 1:12 AM, Maciej Machnikowski wrote: > > Add support for RTNL messages for reading/configuring SyncE recovered > > clocks. > > The messages are: > > RTM_GETRCLKRANGE: Reads the allowed pin index range for the > recovered > > clock outputs. This can be aligned to PHY outputs or > > to EEC inputs, whichever is better for a given > > application > > > > RTM_GETRCLKSTATE: Read the state of recovered pins that output > recovered > > clock from a given port. The message will contain the > > number of assigned clocks (IFLA_RCLK_STATE_COUNT) and > > a N pin inexes in IFLA_RCLK_STATE_OUT_IDX > > > > RTM_SETRCLKSTATE: Sets the redirection of the recovered clock for > > a given pin > > > > Signed-off-by: Maciej Machnikowski > > --- > > > Can't we just use a single RTM msg with nested attributes ? > > With separate RTM msgtype for each syncE attribute we will end up > bloating the RTM msg namespace. > > (these api's could also be in ethtool given its directly querying the > drivers) I'm not a fan of merging those messages. The mergeable ones are GETRCLKRANGE and GETCLKSTATE, but the get range function may be result in a significantly longer call if the information about the underlying HW require any HW calls. They are currently grouped in 3 categories: - reading the boundaries in GetRclkRange (we can later add more to it, like configurable frequency limits) - Reading current configuration - setting the required configuration I don't plan adding any additional RTM msg types for those (and that's the reason why I pulled them before EEC state which may have more messages in the future) We also discussed ethtool way in the past RFCs, but this concept is applicable to any transport layer so I'd rather not limit it to ethernet devices (i.e. SONET, infiniband and others). Regards Maciek From brett.creeley at intel.com Fri Nov 5 16:20:25 2021 From: brett.creeley at intel.com (Brett Creeley) Date: Fri, 5 Nov 2021 09:20:25 -0700 Subject: [Intel-wired-lan] [PATCH net] iavf: Fix VLAN feature flags after VFR Message-ID: <20211105162025.23912-1-brett.creeley@intel.com> When a VF goes through a reset, it's possible for the VF's feature set to change. For example it may lose the VIRTCHNL_VF_OFFLOAD_VLAN capability after VF reset. Unfortunately, the driver doesn't correctly deal with this situation and errors are seen from downing/upping the interface and/or moving the interface in/out of a network namespace. When setting the interface down/up we see the following errors after the VIRTCHNL_VF_OFFLOAD_VLAN capability was taken away from the VF: ice 0000:51:00.1: VF 1 failed opcode 12, retval: -64 iavf 0000:51:09.1: Failed to add VLAN filter, error IAVF_NOT_SUPPORTED ice 0000:51:00.1: VF 1 failed opcode 13, retval: -64 iavf 0000:51:09.1: Failed to delete VLAN filter, error IAVF_NOT_SUPPORTED These add/delete errors are happening because the VLAN filters are tracked internally to the driver and regardless of the VLAN_ALLOWED() setting the driver tries to delete/re-add them over virtchnl. Fix the delete failure by making sure to delete any VLAN filter tracking in the driver when a removal request is made, while preventing the virtchnl request. This makes it so the driver's VLAN list is up to date and the errors are Fix the add failure by making sure the check for VLAN_ALLOWED() during reset is done after the VF receives its capability list from the PF via VIRTCHNL_OP_GET_VF_RESOURCES. If VLAN functionality is not allowed, then prevent requesting re-adding the filters over virtchnl. When moving the interface into a network namespace we see the following errors after the VIRTCHNL_VF_OFFLOAD_VLAN capability was taken away from the VF: iavf 0000:51:09.1 enp81s0f1v1: NIC Link is Up Speed is 25 Gbps Full Duplex iavf 0000:51:09.1 temp_27: renamed from enp81s0f1v1 iavf 0000:51:09.1 mgmt: renamed from temp_27 iavf 0000:51:09.1 dev27: set_features() failed (-22); wanted 0x020190001fd54833, left 0x020190001fd54bb3 These errors are happening because we aren't correctly updating the netdev capabilities and dealing with ndo_fix_features() and ndo_set_features() correctly. Fix this by only reporting errors in the driver's ndo_set_features() callback when VIRTCHNL_VF_OFFLOAD_VLAN is not allowed and any attempt to enable the VLAN features is made. Also, make sure to disable VLAN insertion, filtering, and stripping since the VIRTCHNL_VF_OFFLOAD_VLAN flag applies to all of them and not just VLAN stripping. Also, after we process the capabilities in the VF reset path, make sure to call netdev_update_features() in case the capabilities have changed in order to update the netdev's feature set to match the VF's actual capabilities. Lastly, make sure to always report success on VLAN filter delete when VIRTCHNL_VF_OFFLOAD_VLAN is not supported. The changed flow in iavf_del_vlans() allows the stack to delete previosly existing VLAN filters even if VLAN filtering is not allowed. This makes it so the VLAN filter list is up to date. Fixes: 8774370d268f ("i40e/i40evf: support for VF VLAN tag stripping control") Signed-off-by: Brett Creeley --- drivers/net/ethernet/intel/iavf/iavf.h | 1 + drivers/net/ethernet/intel/iavf/iavf_main.c | 33 ++++++-------- .../net/ethernet/intel/iavf/iavf_virtchnl.c | 45 +++++++++++++++++-- 3 files changed, 56 insertions(+), 23 deletions(-) diff --git a/drivers/net/ethernet/intel/iavf/iavf.h b/drivers/net/ethernet/intel/iavf/iavf.h index e66a7e455ce1..4d62231ec6b5 100644 --- a/drivers/net/ethernet/intel/iavf/iavf.h +++ b/drivers/net/ethernet/intel/iavf/iavf.h @@ -505,4 +505,5 @@ void iavf_add_adv_rss_cfg(struct iavf_adapter *adapter); void iavf_del_adv_rss_cfg(struct iavf_adapter *adapter); struct iavf_mac_filter *iavf_add_filter(struct iavf_adapter *adapter, const u8 *macaddr); +int iavf_lock_timeout(struct mutex *lock, unsigned int msecs); #endif /* _IAVF_H_ */ diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c index 814c87715f68..a655073af6c7 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_main.c +++ b/drivers/net/ethernet/intel/iavf/iavf_main.c @@ -147,7 +147,7 @@ enum iavf_status iavf_free_virt_mem_d(struct iavf_hw *hw, * * Returns 0 on success, negative on failure **/ -static int iavf_lock_timeout(struct mutex *lock, unsigned int msecs) +int iavf_lock_timeout(struct mutex *lock, unsigned int msecs) { unsigned int wait, delay = 10; @@ -717,13 +717,11 @@ static void iavf_del_vlan(struct iavf_adapter *adapter, u16 vlan) **/ static void iavf_restore_filters(struct iavf_adapter *adapter) { - /* re-add all VLAN filters */ - if (VLAN_ALLOWED(adapter)) { - u16 vid; + u16 vid; - for_each_set_bit(vid, adapter->vsi.active_vlans, VLAN_N_VID) - iavf_add_vlan(adapter, vid); - } + /* re-add all VLAN filters */ + for_each_set_bit(vid, adapter->vsi.active_vlans, VLAN_N_VID) + iavf_add_vlan(adapter, vid); } /** @@ -758,9 +756,6 @@ static int iavf_vlan_rx_kill_vid(struct net_device *netdev, { struct iavf_adapter *adapter = netdev_priv(netdev); - if (!VLAN_ALLOWED(adapter)) - return -EIO; - iavf_del_vlan(adapter, vid); clear_bit(vid, adapter->vsi.active_vlans); @@ -2191,7 +2186,6 @@ static void iavf_reset_task(struct work_struct *work) struct net_device *netdev = adapter->netdev; struct iavf_hw *hw = &adapter->hw; struct iavf_mac_filter *f, *ftmp; - struct iavf_vlan_filter *vlf; struct iavf_cloud_filter *cf; u32 reg_val; int i = 0, err; @@ -2332,11 +2326,6 @@ static void iavf_reset_task(struct work_struct *work) list_for_each_entry(f, &adapter->mac_filter_list, list) { f->add = true; } - /* re-add all VLAN filters */ - list_for_each_entry(vlf, &adapter->vlan_filter_list, list) { - vlf->add = true; - } - spin_unlock_bh(&adapter->mac_vlan_list_lock); /* check if TCs are running and re-add all cloud filters */ @@ -2350,7 +2339,6 @@ static void iavf_reset_task(struct work_struct *work) spin_unlock_bh(&adapter->cloud_filter_list_lock); adapter->aq_required |= IAVF_FLAG_AQ_ADD_MAC_FILTER; - adapter->aq_required |= IAVF_FLAG_AQ_ADD_VLAN_FILTER; adapter->aq_required |= IAVF_FLAG_AQ_ADD_CLOUD_FILTER; iavf_misc_irq_enable(adapter); @@ -3465,11 +3453,16 @@ static int iavf_set_features(struct net_device *netdev, { struct iavf_adapter *adapter = netdev_priv(netdev); - /* Don't allow changing VLAN_RX flag when adapter is not capable - * of VLAN offload + /* Don't allow enabling VLAN features when adapter is not capable + * of VLAN offload/filtering */ if (!VLAN_ALLOWED(adapter)) { - if ((netdev->features ^ features) & NETIF_F_HW_VLAN_CTAG_RX) + netdev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_CTAG_FILTER); + if (features & (NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_CTAG_FILTER)) return -EINVAL; } else if ((netdev->features ^ features) & NETIF_F_HW_VLAN_CTAG_RX) { if (features & NETIF_F_HW_VLAN_CTAG_RX) diff --git a/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c b/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c index 8c3f0f77cb57..26ae289a0524 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c +++ b/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c @@ -607,7 +607,7 @@ void iavf_add_vlans(struct iavf_adapter *adapter) if (f->add) count++; } - if (!count) { + if (!count || !VLAN_ALLOWED(adapter)) { adapter->aq_required &= ~IAVF_FLAG_AQ_ADD_VLAN_FILTER; spin_unlock_bh(&adapter->mac_vlan_list_lock); return; @@ -673,9 +673,19 @@ void iavf_del_vlans(struct iavf_adapter *adapter) spin_lock_bh(&adapter->mac_vlan_list_lock); - list_for_each_entry(f, &adapter->vlan_filter_list, list) { - if (f->remove) + list_for_each_entry_safe(f, ftmp, &adapter->vlan_filter_list, list) { + /* since VLAN capabilities are not allowed, we dont want to send + * a VLAN delete request because it will most likely fail and + * create unnecessary errors/noise, so just free the VLAN + * filters marked for removal to enable bailing out before + * sending a virtchnl message + */ + if (f->remove && !VLAN_ALLOWED(adapter)) { + list_del(&f->list); + kfree(f); + } else if (f->remove) { count++; + } } if (!count) { adapter->aq_required &= ~IAVF_FLAG_AQ_DEL_VLAN_FILTER; @@ -1722,8 +1732,37 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter, } spin_lock_bh(&adapter->mac_vlan_list_lock); iavf_add_filter(adapter, adapter->hw.mac.addr); + + if (VLAN_ALLOWED(adapter)) { + if (!list_empty(&adapter->vlan_filter_list)) { + struct iavf_vlan_filter *vlf; + + /* re-add all VLAN filters over virtchnl */ + list_for_each_entry(vlf, + &adapter->vlan_filter_list, + list) + vlf->add = true; + + adapter->aq_required |= + IAVF_FLAG_AQ_ADD_VLAN_FILTER; + } + } + spin_unlock_bh(&adapter->mac_vlan_list_lock); iavf_process_config(adapter); + + /* unlock crit_lock before acquiring rtnl_lock as other + * processes holding rtnl_lock could be waiting for the same + * crit_lock + */ + mutex_unlock(&adapter->crit_lock); + rtnl_lock(); + netdev_update_features(adapter->netdev); + rtnl_unlock(); + if (iavf_lock_timeout(&adapter->crit_lock, 10000)) + dev_warn(&adapter->pdev->dev, "failed to acquire crit_lock in %s\n", + __FUNCTION__); + } break; case VIRTCHNL_OP_ENABLE_QUEUES: -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:25 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:25 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 0/6] Add RTNL interface for SyncE Message-ID: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Synchronous Ethernet networks use a physical layer clock to syntonize the frequency across different network elements. Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet Equipment Clock (EEC) and have the ability to recover synchronization from the synchronization inputs - either traffic interfaces or external frequency sources. The EEC can synchronize its frequency (syntonize) to any of those sources. It is also able to select synchronization source through priority tables and synchronization status messaging. It also provides neccessary filtering and holdover capabilities This patch series introduces basic interface for reading the Ethernet Equipment Clock (EEC) state on a SyncE capable device. This state gives information about the source of the syntonization signal (ether my port, or any external one) and the state of EEC. This interface is required\ to implement Synchronization Status Messaging on upper layers. v2: - improved documentation - fixed kdoc warning RFC history: v2: - removed whitespace changes - fix issues reported by test robot v3: - Changed naming from SyncE to EEC - Clarify cover letter and commit message for patch 1 v4: - Removed sync_source and pin_idx info - Changed one structure to attributes - Added EEC_SRC_PORT flag to indicate that the EEC is synchronized to the recovered clock of a port that returns the state v5: - add EEC source as an optiona attribute - implement support for recovered clocks - align states returned by EEC to ITU-T G.781 v6: - fix EEC clock state reporting - add documentation - fix descriptions in code comments Maciej Machnikowski (6): ice: add support detecting features based on netlist rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status ice: add support for reading SyncE DPLL state rtnetlink: Add support for SyncE recovered clock configuration ice: add support for SyncE recovered clocks docs: net: Add description of SyncE interfaces Documentation/networking/synce.rst | 117 ++++++++ drivers/net/ethernet/intel/ice/ice.h | 7 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 94 ++++++- drivers/net/ethernet/intel/ice/ice_common.c | 224 ++++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 20 +- drivers/net/ethernet/intel/ice/ice_devids.h | 3 + drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- drivers/net/ethernet/intel/ice/ice_main.c | 137 ++++++++++ drivers/net/ethernet/intel/ice/ice_ptp.c | 34 +++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 49 ++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 22 ++ drivers/net/ethernet/intel/ice/ice_type.h | 1 + include/linux/netdevice.h | 33 +++ include/uapi/linux/if_link.h | 57 ++++ include/uapi/linux/rtnetlink.h | 10 + net/core/rtnetlink.c | 253 ++++++++++++++++++ security/selinux/nlmsgtab.c | 6 +- 17 files changed, 1069 insertions(+), 4 deletions(-) create mode 100644 Documentation/networking/synce.rst -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:26 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:26 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 1/6] ice: add support detecting features based on netlist In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-2-maciej.machnikowski@intel.com> Add new functions to check netlist of a given board for: - Recovered Clock device, - Clock Generation Unit, - Clock Multiplexer, Initialize feature bits depending on detected components. Signed-off-by: Maciej Machnikowski --- drivers/net/ethernet/intel/ice/ice.h | 2 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 7 +- drivers/net/ethernet/intel/ice/ice_common.c | 123 ++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 9 ++ drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 1 + drivers/net/ethernet/intel/ice/ice_type.h | 1 + 7 files changed, 147 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index bf4ecd9a517c..3dc4caa41565 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -186,6 +186,8 @@ enum ice_feature { ICE_F_DSCP, + ICE_F_CGU, + ICE_F_PHY_RCLK, ICE_F_SMA_CTRL, ICE_F_MAX }; diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 4eef3488d86f..339c2a86f680 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1297,6 +1297,8 @@ struct ice_aqc_link_topo_params { #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) @@ -1333,7 +1335,10 @@ struct ice_aqc_link_topo_addr { struct ice_aqc_get_link_topo { struct ice_aqc_link_topo_addr addr; u8 node_part_num; -#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PKVL 0x31 +#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 u8 rsvd[9]; }; diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index b3066d0fea8b..35903b282885 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -274,6 +274,79 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); } +/** + * ice_aq_get_netlist_node + * @hw: pointer to the hw struct + * @cmd: get_link_topo AQ structure + * @node_part_number: output node part number if node found + * @node_handle: output node handle parameter if node found + */ +enum ice_status +ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle) +{ + struct ice_aq_desc desc; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); + desc.params.get_link_topo = *cmd; + + if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) + return ICE_ERR_NOT_SUPPORTED; + + if (node_handle) + *node_handle = + le16_to_cpu(desc.params.get_link_topo.addr.handle); + if (node_part_number) + *node_part_number = desc.params.get_link_topo.node_part_num; + + return ICE_SUCCESS; +} + +#define MAX_NETLIST_SIZE 10 +/** + * ice_find_netlist_node + * @hw: pointer to the hw struct + * @node_type_ctx: type of netlist node to look for + * @node_part_number: node part number to look for + * @node_handle: output parameter if node found - optional + * + * Find and return the node handle for a given node type and part number in the + * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST + * otherwise. If @node_handle provided, it would be set to found node handle. + */ +enum ice_status +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle) +{ + struct ice_aqc_get_link_topo cmd; + u8 rec_node_part_number; + enum ice_status status; + u16 rec_node_handle; + u8 idx; + + for (idx = 0; idx < MAX_NETLIST_SIZE; idx++) { + memset(&cmd, 0, sizeof(cmd)); + + cmd.addr.topo_params.node_type_ctx = + (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S); + cmd.addr.topo_params.index = idx; + + status = ice_aq_get_netlist_node(hw, &cmd, + &rec_node_part_number, + &rec_node_handle); + if (status) + return status; + + if (rec_node_part_number == node_part_number) { + if (node_handle) + *node_handle = rec_node_handle; + return ICE_SUCCESS; + } + } + + return ICE_ERR_DOES_NOT_EXIST; +} + /** * ice_is_media_cage_present * @pi: port information structure @@ -5083,3 +5156,53 @@ bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw) } return false; } + +/** + * ice_is_phy_rclk_present_e810t + * @hw: pointer to the hw struct + * + * Check if the PHY Recovered Clock device is present in the netlist + */ +bool ice_is_phy_rclk_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_PKVL, NULL)) + return false; + + return true; +} + +/** + * ice_is_cgu_present_e810t + * @hw: pointer to the hw struct + * + * Check if the Clock Generation Unit (CGU) device is present in the netlist + */ +bool ice_is_cgu_present_e810t(struct ice_hw *hw) +{ + if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032, + NULL)) { + hw->cgu_part_number = + ICE_ACQ_GET_LINK_TOPO_NODE_NR_ZL30632_80032; + return true; + } + return false; +} + +/** + * ice_is_clock_mux_present_e810t + * @hw: pointer to the hw struct + * + * Check if the Clock Multiplexer device is present in the netlist + */ +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) +{ + if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, + ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, + NULL)) + return false; + + return true; +} + diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index 65c1b3244264..b20a5c085246 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -89,6 +89,12 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, struct ice_aqc_get_phy_caps_data *caps, struct ice_sq_cd *cd); enum ice_status +ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle); +enum ice_status +ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, + u16 *node_handle); +enum ice_status ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, enum ice_adminq_opc opc, struct ice_sq_cd *cd); enum ice_status @@ -206,4 +212,7 @@ bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); enum ice_status ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); +bool ice_is_phy_rclk_present_e810t(struct ice_hw *hw); +bool ice_is_cgu_present_e810t(struct ice_hw *hw); +bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); #endif /* _ICE_COMMON_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 40562600a8cf..2422215b7937 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -4183,8 +4183,12 @@ void ice_init_feature_support(struct ice_pf *pf) case ICE_DEV_ID_E810C_QSFP: case ICE_DEV_ID_E810C_SFP: ice_set_feature_support(pf, ICE_F_DSCP); - if (ice_is_e810t(&pf->hw)) + if (ice_is_clock_mux_present_e810t(&pf->hw)) ice_set_feature_support(pf, ICE_F_SMA_CTRL); + if (ice_is_phy_rclk_present_e810t(&pf->hw)) + ice_set_feature_support(pf, ICE_F_PHY_RCLK); + if (ice_is_cgu_present_e810t(&pf->hw)) + ice_set_feature_support(pf, ICE_F_CGU); break; default: break; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index 29f947c0cd2e..aa257db36765 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -800,3 +800,4 @@ bool ice_is_pca9575_present(struct ice_hw *hw) return !status && handle; } + diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h index 9e0c2923c62e..a9dc16641bd4 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -920,6 +920,7 @@ struct ice_hw { struct list_head rss_list_head; struct ice_mbx_snapshot mbx_snapshot; u16 io_expander_handle; + u8 cgu_part_number; }; /* Statistics collected by each port, VSI, VEB, and S-channel */ -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:27 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:27 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 2/6] rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-3-maciej.machnikowski@intel.com> This patch series introduces basic interface for reading the Ethernet Equipment Clock (EEC) state on a SyncE capable device. This state gives information about the state of EEC. This interface is required to implement Synchronization Status Messaging on upper layers. Initial implementation returns SyncE EEC state in the IFLA_EEC_STATE attribute. The optional index of input that's used as a source can be returned in the IFLA_EEC_SRC_IDX attribute. SyncE EEC state read needs to be implemented as a ndo_get_eec_state function. The index will be read by calling the ndo_get_eec_src. Signed-off-by: Maciej Machnikowski --- include/linux/netdevice.h | 13 ++++++ include/uapi/linux/if_link.h | 31 +++++++++++++ include/uapi/linux/rtnetlink.h | 3 ++ net/core/rtnetlink.c | 79 ++++++++++++++++++++++++++++++++++ security/selinux/nlmsgtab.c | 3 +- 5 files changed, 128 insertions(+), 1 deletion(-) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 3ec42495a43a..ef2b381dae0c 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1344,6 +1344,13 @@ struct netdev_net_notifier { * The caller must be under RCU read context. * int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); * Get the forwarding path to reach the real device from the HW destination address + * int (*ndo_get_eec_state)(struct net_device *dev, enum if_eec_state *state, + * u32 *src_idx, struct netlink_ext_ack *extack); + * Get state of physical layer frequency synchronization (SyncE) + * int (*ndo_get_eec_src)(struct net_device *dev, u32 *src, + * struct netlink_ext_ack *extack); + * Get the index of the source signal that's currently used as EEC's + * reference */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); @@ -1563,6 +1570,12 @@ struct net_device_ops { struct net_device * (*ndo_get_peer_dev)(struct net_device *dev); int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path); + int (*ndo_get_eec_state)(struct net_device *dev, + enum if_eec_state *state, + struct netlink_ext_ack *extack); + int (*ndo_get_eec_src)(struct net_device *dev, + u32 *src, + struct netlink_ext_ack *extack); }; /** diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h index eebd3894fe89..8eae80f287e9 100644 --- a/include/uapi/linux/if_link.h +++ b/include/uapi/linux/if_link.h @@ -1273,4 +1273,35 @@ enum { #define IFLA_MCTP_MAX (__IFLA_MCTP_MAX - 1) +/* SyncE section */ + +enum if_eec_state { + IF_EEC_STATE_INVALID = 0, /* state is not valid */ + IF_EEC_STATE_FREERUN, /* clock is free-running */ + IF_EEC_STATE_LOCKED, /* clock is locked to the reference, + * but the holdover memory is not valid + */ + IF_EEC_STATE_LOCKED_HO_ACQ, /* clock is locked to the reference + * and holdover memory is valid + */ + IF_EEC_STATE_HOLDOVER, /* clock is in holdover mode */ +}; + +#define EEC_SRC_PORT (1 << 0) /* recovered clock from the port is + * currently the source for the EEC + */ + +struct if_eec_state_msg { + __u32 ifindex; +}; + +enum { + IFLA_EEC_UNSPEC, + IFLA_EEC_STATE, + IFLA_EEC_SRC_IDX, + __IFLA_EEC_MAX, +}; + +#define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) + #endif /* _UAPI_LINUX_IF_LINK_H */ diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h index 5888492a5257..1d8662afd6bd 100644 --- a/include/uapi/linux/rtnetlink.h +++ b/include/uapi/linux/rtnetlink.h @@ -185,6 +185,9 @@ enum { RTM_GETNEXTHOPBUCKET, #define RTM_GETNEXTHOPBUCKET RTM_GETNEXTHOPBUCKET + RTM_GETEECSTATE = 124, +#define RTM_GETEECSTATE RTM_GETEECSTATE + __RTM_MAX, #define RTM_MAX (((__RTM_MAX + 3) & ~3) - 1) }; diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 2af8aeeadadf..03bc773d0e69 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -5467,6 +5467,83 @@ static int rtnl_stats_dump(struct sk_buff *skb, struct netlink_callback *cb) return skb->len; } +static int rtnl_fill_eec_state(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, struct netlink_callback *cb, + int flags, struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + struct if_eec_state_msg *state_msg; + enum if_eec_state state; + struct nlmsghdr *nlh; + u32 src_idx; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_eec_state) + return -EOPNOTSUPP; + + err = ops->ndo_get_eec_state(dev, &state, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETEECSTATE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + if (nla_put_u32(skb, IFLA_EEC_STATE, state)) + return -EMSGSIZE; + + if (!ops->ndo_get_eec_src) + goto end_msg; + + err = ops->ndo_get_eec_src(dev, &src_idx, extack); + if (err) + return err; + + if (nla_put_u32(skb, IFLA_EEC_SRC_IDX, src_idx)) + return -EMSGSIZE; + +end_msg: + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_eec_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_eec_state(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + /* Process one rtnetlink message. */ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, @@ -5692,4 +5769,6 @@ void __init rtnetlink_init(void) rtnl_register(PF_UNSPEC, RTM_GETSTATS, rtnl_stats_get, rtnl_stats_dump, 0); + + rtnl_register(PF_UNSPEC, RTM_GETEECSTATE, rtnl_eec_state_get, NULL, 0); } diff --git a/security/selinux/nlmsgtab.c b/security/selinux/nlmsgtab.c index 94ea2a8b2bb7..2c66e722ea9c 100644 --- a/security/selinux/nlmsgtab.c +++ b/security/selinux/nlmsgtab.c @@ -91,6 +91,7 @@ static const struct nlmsg_perm nlmsg_route_perms[] = { RTM_NEWNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_DELNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETEECSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, }; static const struct nlmsg_perm nlmsg_tcpdiag_perms[] = @@ -176,7 +177,7 @@ int selinux_nlmsg_lookup(u16 sclass, u16 nlmsg_type, u32 *perm) * structures at the top of this file with the new mappings * before updating the BUILD_BUG_ON() macro! */ - BUILD_BUG_ON(RTM_MAX != (RTM_NEWNEXTHOPBUCKET + 3)); + BUILD_BUG_ON(RTM_MAX != (RTM_GETEECSTATE + 3)); err = nlmsg_perm(nlmsg_type, perm, nlmsg_route_perms, sizeof(nlmsg_route_perms)); break; -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:28 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:28 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 3/6] ice: add support for reading SyncE DPLL state In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-4-maciej.machnikowski@intel.com> Implement SyncE DPLL monitoring for E810-T devices. Poll loop will periodically check the state of the DPLL and cache it in the pf structure. State changes will be logged in the system log. Cached state can be read using the RTM_GETEECSTATE rtnetlink message. Signed-off-by: Maciej Machnikowski --- drivers/net/ethernet/intel/ice/ice.h | 5 ++ .../net/ethernet/intel/ice/ice_adminq_cmd.h | 34 +++++++++++++ drivers/net/ethernet/intel/ice/ice_common.c | 36 ++++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 5 +- drivers/net/ethernet/intel/ice/ice_devids.h | 3 ++ drivers/net/ethernet/intel/ice/ice_main.c | 46 ++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp.c | 34 +++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 48 +++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 22 +++++++++ 9 files changed, 232 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index 3dc4caa41565..1dff7ca704d4 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -609,6 +609,11 @@ struct ice_pf { #define ICE_VF_AGG_NODE_ID_START 65 #define ICE_MAX_VF_AGG_NODES 32 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; + + enum if_eec_state synce_dpll_state; + u8 synce_dpll_pin; + enum if_eec_state ptp_dpll_state; + u8 ptp_dpll_pin; }; struct ice_netdev_priv { diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 339c2a86f680..11226af7a9a4 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1808,6 +1808,36 @@ struct ice_aqc_add_rdma_qset_data { struct ice_aqc_add_tx_rdma_qset_entry rdma_qsets[]; }; +/* Get CGU DPLL status (direct 0x0C66) */ +struct ice_aqc_get_cgu_dpll_status { + u8 dpll_num; + u8 ref_state; +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4) +#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6) +#define ICE_AQC_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(7) + __le16 dpll_state; +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO BIT(1) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT 8 +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SEL \ + ICE_M(0x1F, ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT) +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT 13 +#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE \ + ICE_M(0x7, ICE_AQC_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT) + __le32 phase_offset_h; + __le32 phase_offset_l; + u8 eec_mode; + u8 rsvd[1]; + __le16 node_handle; +}; + /* Configure Firmware Logging Command (indirect 0xFF09) * Logging Information Read Response (indirect 0xFF10) * Note: The 0xFF10 command has no input parameters. @@ -2039,6 +2069,7 @@ struct ice_aq_desc { struct ice_aqc_fw_logging fw_logging; struct ice_aqc_get_clear_fw_log get_clear_fw_log; struct ice_aqc_download_pkg download_pkg; + struct ice_aqc_get_cgu_dpll_status get_cgu_dpll_status; struct ice_aqc_driver_shared_params drv_shared_params; struct ice_aqc_set_mac_lb set_mac_lb; struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; @@ -2205,6 +2236,9 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, + /* 1588/SyncE commands/events */ + ice_aqc_opc_get_cgu_dpll_status = 0x0C66, + ice_aqc_opc_driver_shared_params = 0x0C90, /* Standalone Commands/Events */ diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 35903b282885..8069141ac105 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -4644,6 +4644,42 @@ ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, return ice_status_to_errno(status); } +/** + * ice_aq_get_cgu_dpll_status + * @hw: pointer to the HW struct + * @dpll_num: DPLL index + * @ref_state: Reference clock state + * @dpll_state: DPLL state + * @phase_offset: Phase offset in ps + * @eec_mode: EEC_mode + * + * Get CGU DPLL status (0x0C66) + */ +enum ice_status +ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, + u16 *dpll_state, u64 *phase_offset, u8 *eec_mode) +{ + struct ice_aqc_get_cgu_dpll_status *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_dpll_status); + cmd = &desc.params.get_cgu_dpll_status; + cmd->dpll_num = dpll_num; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) { + *ref_state = cmd->ref_state; + *dpll_state = le16_to_cpu(cmd->dpll_state); + *phase_offset = le32_to_cpu(cmd->phase_offset_h); + *phase_offset <<= 32; + *phase_offset += le32_to_cpu(cmd->phase_offset_l); + *eec_mode = cmd->eec_mode; + } + + return status; +} + /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index b20a5c085246..aaed388a40a8 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -106,6 +106,7 @@ enum ice_status ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, struct ice_sq_cd *cd); bool ice_is_e810(struct ice_hw *hw); +bool ice_is_e810t(struct ice_hw *hw); enum ice_status ice_clear_pf_cfg(struct ice_hw *hw); enum ice_status ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, @@ -162,6 +163,9 @@ ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, int ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 *rdma_qset, u16 num_qsets, u32 *qset_teid); +enum ice_status +ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, + u16 *dpll_state, u64 *phase_offset, u8 *eec_mode); int ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, u16 *q_id); @@ -189,7 +193,6 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, void ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat); -bool ice_is_e810t(struct ice_hw *hw); enum ice_status ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, struct ice_aqc_txsched_elem_data *buf); diff --git a/drivers/net/ethernet/intel/ice/ice_devids.h b/drivers/net/ethernet/intel/ice/ice_devids.h index 61dd2f18dee8..0b654d417d29 100644 --- a/drivers/net/ethernet/intel/ice/ice_devids.h +++ b/drivers/net/ethernet/intel/ice/ice_devids.h @@ -58,4 +58,7 @@ /* Intel(R) Ethernet Connection E822-L 1GbE */ #define ICE_DEV_ID_E822L_SGMII 0x189A +#define ICE_SUBDEV_ID_E810T 0x000E +#define ICE_SUBDEV_ID_E810T2 0x000F + #endif /* _ICE_DEVIDS_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index f099797f35e3..7fac27903ab4 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c @@ -6240,6 +6240,50 @@ static void ice_napi_disable_all(struct ice_vsi *vsi) } } +/** + * ice_get_eec_state - get state of SyncE DPLL + * @netdev: network interface device structure + * @state: state of SyncE DPLL + * @extack: netlink extended ack + */ +static int +ice_get_eec_state(struct net_device *netdev, enum if_eec_state *state, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *state = pf->synce_dpll_state; + + return 0; +} + +/** + * ice_get_eec_src - get reference index of SyncE DPLL + * @netdev: network interface device structure + * @src: index of source reference of the SyncE DPLL + * @extack: netlink extended ack + */ +static int +ice_get_eec_src(struct net_device *netdev, u32 *src, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *src = pf->synce_dpll_pin; + + return 0; +} + /** * ice_down - Shutdown the connection * @vsi: The VSI being stopped @@ -8601,4 +8645,6 @@ static const struct net_device_ops ice_netdev_ops = { .ndo_bpf = ice_xdp, .ndo_xdp_xmit = ice_xdp_xmit, .ndo_xsk_wakeup = ice_xsk_wakeup, + .ndo_get_eec_state = ice_get_eec_state, + .ndo_get_eec_src = ice_get_eec_src, }; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index bf7247c6f58e..a38d0ab4d6d5 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1766,6 +1766,36 @@ static void ice_ptp_tx_tstamp_cleanup(struct ice_ptp_tx *tx) } } +static void ice_handle_cgu_state(struct ice_pf *pf) +{ + enum if_eec_state cgu_state; + u8 pin; + + cgu_state = ice_get_zl_dpll_state(&pf->hw, ICE_CGU_DPLL_SYNCE, &pin); + if (pf->synce_dpll_state != cgu_state) { + pf->synce_dpll_state = cgu_state; + pf->synce_dpll_pin = pin; + + dev_warn(ice_pf_to_dev(pf), + " state changed to: %d, pin %d", + ICE_CGU_DPLL_SYNCE, + pf->synce_dpll_state, + pin); + } + + cgu_state = ice_get_zl_dpll_state(&pf->hw, ICE_CGU_DPLL_PTP, &pin); + if (pf->ptp_dpll_state != cgu_state) { + pf->ptp_dpll_state = cgu_state; + pf->ptp_dpll_pin = pin; + + dev_warn(ice_pf_to_dev(pf), + " state changed to: %d, pin %d", + ICE_CGU_DPLL_PTP, + pf->ptp_dpll_state, + pin); + } +} + static void ice_ptp_periodic_work(struct kthread_work *work) { struct ice_ptp *ptp = container_of(work, struct ice_ptp, work.work); @@ -1774,6 +1804,9 @@ static void ice_ptp_periodic_work(struct kthread_work *work) if (!test_bit(ICE_FLAG_PTP, pf->flags)) return; + if (ice_is_feature_supported(pf, ICE_F_CGU)) + ice_handle_cgu_state(pf); + ice_ptp_update_cached_phctime(pf); ice_ptp_tx_tstamp_cleanup(&pf->ptp.port.tx); @@ -1958,3 +1991,4 @@ void ice_ptp_release(struct ice_pf *pf) dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); } + diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index aa257db36765..7a9482918a20 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -375,6 +375,54 @@ static int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) return 0; } +/** + * ice_get_zl_dpll_state - get the state of the DPLL + * @hw: pointer to the hw struct + * @dpll_idx: Index of internal DPLL unit + * @pin: pointer to a buffer for returning currently active pin + * + * This function will read the state of the DPLL(dpll_idx). If optional + * parameter pin is given it'll be used to retrieve currently active pin. + * + * Return: state of the DPLL + */ +enum if_eec_state +ice_get_zl_dpll_state(struct ice_hw *hw, u8 dpll_idx, u8 *pin) +{ + enum ice_status status; + u64 phase_offset; + u16 dpll_state; + u8 ref_state; + u8 eec_mode; + + if (dpll_idx >= ICE_CGU_DPLL_MAX) + return IF_EEC_STATE_INVALID; + + status = ice_aq_get_cgu_dpll_status(hw, dpll_idx, &ref_state, + &dpll_state, &phase_offset, + &eec_mode); + if (status) + return IF_EEC_STATE_INVALID; + + if (pin) { + /* current ref pin in dpll_state_refsel_status_X register */ + *pin = (dpll_state & + ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SEL) >> + ICE_AQC_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT; + } + + if (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK) { + if (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY) + return IF_EEC_STATE_LOCKED_HO_ACQ; + else + return IF_EEC_STATE_LOCKED; + } else if ((dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO) && + (dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY)) { + return IF_EEC_STATE_HOLDOVER; + } + return IF_EEC_STATE_FREERUN; +} + /* Device agnostic functions * * The following functions implement useful behavior to hide the differences diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h index b2984b5c22c1..fcd543531b2c 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h @@ -33,6 +33,8 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw); int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); bool ice_is_pca9575_present(struct ice_hw *hw); +enum if_eec_state +ice_get_zl_dpll_state(struct ice_hw *hw, u8 dpll_idx, u8 *pin); #define PFTSYN_SEM_BYTES 4 @@ -98,4 +100,24 @@ bool ice_is_pca9575_present(struct ice_hw *hw); #define ICE_SMA_MAX_BIT_E810T 7 #define ICE_PCA9575_P1_OFFSET 8 +enum ice_e810t_cgu_dpll { + ICE_CGU_DPLL_SYNCE, + ICE_CGU_DPLL_PTP, + ICE_CGU_DPLL_MAX +}; + +enum ice_e810t_cgu_pins { + REF0P, + REF0N, + REF1P, + REF1N, + REF2P, + REF2N, + REF3P, + REF3N, + REF4P, + REF4N, + NUM_E810T_CGU_PINS +}; + #endif /* _ICE_PTP_HW_H_ */ -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:29 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:29 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 4/6] rtnetlink: Add support for SyncE recovered clock configuration In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-5-maciej.machnikowski@intel.com> Add support for RTNL messages for reading/configuring SyncE recovered clocks. The messages are: RTM_GETRCLKRANGE: Reads the allowed pin index range for the recovered clock outputs. This can be aligned to PHY outputs or to EEC inputs, whichever is better for a given application RTM_GETRCLKSTATE: Read the state of recovered pins that output recovered clock from a given port. The message will contain the number of assigned clocks (IFLA_RCLK_STATE_COUNT) and a N pin inexes in IFLA_RCLK_STATE_OUT_IDX RTM_SETRCLKSTATE: Sets the redirection of the recovered clock for a given pin Signed-off-by: Maciej Machnikowski --- include/linux/netdevice.h | 9 ++ include/uapi/linux/if_link.h | 26 +++++ include/uapi/linux/rtnetlink.h | 7 ++ net/core/rtnetlink.c | 174 +++++++++++++++++++++++++++++++++ security/selinux/nlmsgtab.c | 3 + 5 files changed, 219 insertions(+) diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index ef2b381dae0c..708bd8336155 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1576,6 +1576,15 @@ struct net_device_ops { int (*ndo_get_eec_src)(struct net_device *dev, u32 *src, struct netlink_ext_ack *extack); + int (*ndo_get_rclk_range)(struct net_device *dev, + u32 *min_idx, u32 *max_idx, + struct netlink_ext_ack *extack); + int (*ndo_set_rclk_out)(struct net_device *dev, + u32 out_idx, bool ena, + struct netlink_ext_ack *extack); + int (*ndo_get_rclk_state)(struct net_device *dev, + u32 out_idx, bool *ena, + struct netlink_ext_ack *extack); }; /** diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h index 8eae80f287e9..e27c153cfba3 100644 --- a/include/uapi/linux/if_link.h +++ b/include/uapi/linux/if_link.h @@ -1304,4 +1304,30 @@ enum { #define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) +struct if_rclk_range_msg { + __u32 ifindex; +}; + +enum { + IFLA_RCLK_RANGE_UNSPEC, + IFLA_RCLK_RANGE_MIN_PIN, + IFLA_RCLK_RANGE_MAX_PIN, + __IFLA_RCLK_RANGE_MAX, +}; + +struct if_set_rclk_msg { + __u32 ifindex; + __u32 out_idx; + __u32 flags; +}; + +#define SET_RCLK_FLAGS_ENA (1U << 0) + +enum { + IFLA_RCLK_STATE_UNSPEC, + IFLA_RCLK_STATE_OUT_IDX, + IFLA_RCLK_STATE_COUNT, + __IFLA_RCLK_STATE_MAX, +}; + #endif /* _UAPI_LINUX_IF_LINK_H */ diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h index 1d8662afd6bd..6c0d96d56ec7 100644 --- a/include/uapi/linux/rtnetlink.h +++ b/include/uapi/linux/rtnetlink.h @@ -185,6 +185,13 @@ enum { RTM_GETNEXTHOPBUCKET, #define RTM_GETNEXTHOPBUCKET RTM_GETNEXTHOPBUCKET + RTM_GETRCLKRANGE = 120, +#define RTM_GETRCLKRANGE RTM_GETRCLKRANGE + RTM_GETRCLKSTATE = 121, +#define RTM_GETRCLKSTATE RTM_GETRCLKSTATE + RTM_SETRCLKSTATE = 122, +#define RTM_SETRCLKSTATE RTM_SETRCLKSTATE + RTM_GETEECSTATE = 124, #define RTM_GETEECSTATE RTM_GETEECSTATE diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 03bc773d0e69..bc1e050f6d38 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -5544,6 +5544,176 @@ static int rtnl_eec_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, return err; } +static int rtnl_fill_rclk_range(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, + struct netlink_callback *cb, int flags, + struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + struct if_rclk_range_msg *state_msg; + struct nlmsghdr *nlh; + u32 min_idx, max_idx; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_rclk_range) + return -EOPNOTSUPP; + + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKRANGE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + if (nla_put_u32(skb, IFLA_RCLK_RANGE_MIN_PIN, min_idx) || + nla_put_u32(skb, IFLA_RCLK_RANGE_MAX_PIN, max_idx)) + return -EMSGSIZE; + + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_rclk_range_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_rclk_range(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + +static int rtnl_fill_rclk_state(struct sk_buff *skb, struct net_device *dev, + u32 portid, u32 seq, + struct netlink_callback *cb, int flags, + struct netlink_ext_ack *extack) +{ + const struct net_device_ops *ops = dev->netdev_ops; + u32 min_idx, max_idx, src_idx, count = 0; + struct if_eec_state_msg *state_msg; + struct nlmsghdr *nlh; + bool ena; + int err; + + ASSERT_RTNL(); + + if (!ops->ndo_get_rclk_state || !ops->ndo_get_rclk_range) + return -EOPNOTSUPP; + + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); + if (err) + return err; + + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKSTATE, sizeof(*state_msg), + flags); + if (!nlh) + return -EMSGSIZE; + + state_msg = nlmsg_data(nlh); + state_msg->ifindex = dev->ifindex; + + for (src_idx = min_idx; src_idx <= max_idx; src_idx++) { + ops->ndo_get_rclk_state(dev, src_idx, &ena, extack); + if (!ena) + continue; + + if (nla_put_u32(skb, IFLA_RCLK_STATE_OUT_IDX, src_idx)) + return -EMSGSIZE; + count++; + } + + if (nla_put_u32(skb, IFLA_RCLK_STATE_COUNT, count)) + return -EMSGSIZE; + + nlmsg_end(skb, nlh); + return 0; +} + +static int rtnl_rclk_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_eec_state_msg *state; + struct net_device *dev; + struct sk_buff *nskb; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + if (!nskb) + return -ENOBUFS; + + err = rtnl_fill_rclk_state(nskb, dev, NETLINK_CB(skb).portid, + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, + extack); + if (err < 0) + kfree_skb(nskb); + else + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); + + return err; +} + +static int rtnl_rclk_set(struct sk_buff *skb, struct nlmsghdr *nlh, + struct netlink_ext_ack *extack) +{ + struct net *net = sock_net(skb->sk); + struct if_set_rclk_msg *state; + struct net_device *dev; + bool ena; + int err; + + state = nlmsg_data(nlh); + dev = __dev_get_by_index(net, state->ifindex); + if (!dev) { + NL_SET_ERR_MSG(extack, "unknown ifindex"); + return -ENODEV; + } + + if (!dev->netdev_ops->ndo_set_rclk_out) + return -EOPNOTSUPP; + + ena = !!(state->flags & SET_RCLK_FLAGS_ENA); + err = dev->netdev_ops->ndo_set_rclk_out(dev, state->out_idx, ena, + extack); + + return err; +} + /* Process one rtnetlink message. */ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, @@ -5770,5 +5940,9 @@ void __init rtnetlink_init(void) rtnl_register(PF_UNSPEC, RTM_GETSTATS, rtnl_stats_get, rtnl_stats_dump, 0); + rtnl_register(PF_UNSPEC, RTM_GETRCLKRANGE, rtnl_rclk_range_get, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_GETRCLKSTATE, rtnl_rclk_state_get, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_SETRCLKSTATE, rtnl_rclk_set, NULL, 0); + rtnl_register(PF_UNSPEC, RTM_GETEECSTATE, rtnl_eec_state_get, NULL, 0); } diff --git a/security/selinux/nlmsgtab.c b/security/selinux/nlmsgtab.c index 2c66e722ea9c..57c7c85edd4d 100644 --- a/security/selinux/nlmsgtab.c +++ b/security/selinux/nlmsgtab.c @@ -91,6 +91,9 @@ static const struct nlmsg_perm nlmsg_route_perms[] = { RTM_NEWNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_DELNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETRCLKRANGE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_GETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, + { RTM_SETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, { RTM_GETEECSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, }; -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:30 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:30 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 5/6] ice: add support for SyncE recovered clocks In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-6-maciej.machnikowski@intel.com> Implement NDO functions for handling SyncE recovered clocks. Signed-off-by: Maciej Machnikowski --- .../net/ethernet/intel/ice/ice_adminq_cmd.h | 53 +++++++++++ drivers/net/ethernet/intel/ice/ice_common.c | 65 +++++++++++++ drivers/net/ethernet/intel/ice/ice_common.h | 6 ++ drivers/net/ethernet/intel/ice/ice_main.c | 91 +++++++++++++++++++ include/linux/netdevice.h | 11 +++ 5 files changed, 226 insertions(+) diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 11226af7a9a4..dace00a35c44 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1281,6 +1281,31 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; +/* Set PHY recovered clock output (direct 0x0630) */ +struct ice_aqc_set_phy_rec_clk_out { + u8 phy_output; + u8 port_num; + u8 flags; +#define ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN BIT(0) +#define ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT 0xFF + u8 rsvd; + __le32 freq; + u8 rsvd2[6]; + __le16 node_handle; +}; + +/* Get PHY recovered clock output (direct 0x0631) */ +struct ice_aqc_get_phy_rec_clk_out { + u8 phy_output; + u8 port_num; + u8 flags; +#define ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN BIT(0) + u8 rsvd; + __le32 freq; + u8 rsvd2[6]; + __le16 node_handle; +}; + struct ice_aqc_link_topo_params { u8 lport_num; u8 lport_num_valid; @@ -1838,6 +1863,28 @@ struct ice_aqc_get_cgu_dpll_status { __le16 node_handle; }; +/* Read CGU register (direct 0x0C6E) */ +struct ice_aqc_read_cgu_reg { + __le16 offset; +#define ICE_AQC_READ_CGU_REG_MAX_DATA_LEN 16 + u8 data_len; + u8 rsvd[13]; +}; + +/* Read CGU register response (direct 0x0C6E) */ +struct ice_aqc_read_cgu_reg_resp { + u8 data[ICE_AQC_READ_CGU_REG_MAX_DATA_LEN]; +}; + +/* Write CGU register (direct 0x0C6F) */ +struct ice_aqc_write_cgu_reg { + __le16 offset; +#define ICE_AQC_WRITE_CGU_REG_MAX_DATA_LEN 7 + u8 data_len; + u8 data[ICE_AQC_WRITE_CGU_REG_MAX_DATA_LEN]; + u8 rsvd[6]; +}; + /* Configure Firmware Logging Command (indirect 0xFF09) * Logging Information Read Response (indirect 0xFF10) * Note: The 0xFF10 command has no input parameters. @@ -2033,6 +2080,8 @@ struct ice_aq_desc { struct ice_aqc_get_phy_caps get_phy; struct ice_aqc_set_phy_cfg set_phy; struct ice_aqc_restart_an restart_an; + struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out; + struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out; struct ice_aqc_gpio read_write_gpio; struct ice_aqc_sff_eeprom read_write_sff_param; struct ice_aqc_set_port_id_led set_port_id_led; @@ -2188,6 +2237,8 @@ enum ice_adminq_opc { ice_aqc_opc_get_link_status = 0x0607, ice_aqc_opc_set_event_mask = 0x0613, ice_aqc_opc_set_mac_lb = 0x0620, + ice_aqc_opc_set_phy_rec_clk_out = 0x0630, + ice_aqc_opc_get_phy_rec_clk_out = 0x0631, ice_aqc_opc_get_link_topo = 0x06E0, ice_aqc_opc_set_port_id_led = 0x06E9, ice_aqc_opc_set_gpio = 0x06EC, @@ -2238,6 +2289,8 @@ enum ice_adminq_opc { /* 1588/SyncE commands/events */ ice_aqc_opc_get_cgu_dpll_status = 0x0C66, + ice_aqc_opc_read_cgu_reg = 0x0C6E, + ice_aqc_opc_write_cgu_reg = 0x0C6F, ice_aqc_opc_driver_shared_params = 0x0C90, diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 8069141ac105..29d302ea1e56 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -5242,3 +5242,68 @@ bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) return true; } +/** + * ice_aq_set_phy_rec_clk_out - set RCLK phy out + * @hw: pointer to the HW struct + * @phy_output: PHY reference clock output pin + * @enable: GPIO state to be applied + * @freq: PHY output frequency + * + * Set CGU reference priority (0x0630) + * Return 0 on success or negative value on failure. + */ +enum ice_status +ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, + u32 *freq) +{ + struct ice_aqc_set_phy_rec_clk_out *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_rec_clk_out); + cmd = &desc.params.set_phy_rec_clk_out; + cmd->phy_output = phy_output; + cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; + cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; + cmd->freq = cpu_to_le32(*freq); + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) + *freq = le32_to_cpu(cmd->freq); + + return status; +} + +/** + * ice_aq_get_phy_rec_clk_out + * @hw: pointer to the HW struct + * @phy_output: PHY reference clock output pin + * @port_num: Port number + * @flags: PHY flags + * @freq: PHY output frequency + * + * Get PHY recovered clock output (0x0631) + */ +enum ice_status +ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, u8 *port_num, + u8 *flags, u32 *freq) +{ + struct ice_aqc_get_phy_rec_clk_out *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_rec_clk_out); + cmd = &desc.params.get_phy_rec_clk_out; + cmd->phy_output = phy_output; + cmd->port_num = *port_num; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); + if (!status) { + *port_num = cmd->port_num; + *flags = cmd->flags; + *freq = le32_to_cpu(cmd->freq); + } + + return status; +} + diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h index aaed388a40a8..8a99c8364173 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -166,6 +166,12 @@ ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, enum ice_status ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, u16 *dpll_state, u64 *phase_offset, u8 *eec_mode); +enum ice_status +ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, + u32 *freq); +enum ice_status +ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, u8 *port_num, + u8 *flags, u32 *freq); int ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, u16 *q_id); diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index 7fac27903ab4..98834aa3f3dc 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c @@ -6284,6 +6284,94 @@ ice_get_eec_src(struct net_device *netdev, u32 *src, return 0; } +/** + * ice_get_rclk_range - get range of recovered clock indices + * @netdev: network interface device structure + * @min_idx: min rclk index + * @max_idx: max rclk index + * @extack: netlink extended ack + */ +static int +ice_get_rclk_range(struct net_device *netdev, u32 *min_idx, u32 *max_idx, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + *min_idx = REF1P; + *max_idx = REF1N; + + return 0; +} + +/** + * ice_set_rclk_out - set recovered clock redirection to the output pin + * @netdev: network interface device structure + * @out_idx: output index + * @ena: true will enable redirection, false will disable it + * @extack: netlink extended ack + */ +static int +ice_set_rclk_out(struct net_device *netdev, u32 out_idx, bool ena, + struct netlink_ext_ack *extack) +{ + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + enum ice_status ret; + u32 freq; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + if (out_idx < REF1P || out_idx > REF1N) + return -EINVAL; + + ret = ice_aq_set_phy_rec_clk_out(&pf->hw, out_idx - REF1P, ena, &freq); + + return ice_status_to_errno(ret); +} + +/** + * ice_get_rclk_state - Get state of recovered clock pin for a given netdev + * @netdev: network interface device structure + * @out_idx: output index + * @ena: returns true if the pin is enabled + * @extack: netlink extended ack + */ +static int +ice_get_rclk_state(struct net_device *netdev, u32 out_idx, bool *ena, + struct netlink_ext_ack *extack) +{ + u8 port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; + struct ice_netdev_priv *np = netdev_priv(netdev); + struct ice_vsi *vsi = np->vsi; + struct ice_pf *pf = vsi->back; + enum ice_status ret; + u32 freq; + u8 flags; + + if (!ice_is_feature_supported(pf, ICE_F_CGU)) + return -EOPNOTSUPP; + + if (out_idx < REF1P || out_idx > REF1N) + return -EINVAL; + + ret = ice_aq_get_phy_rec_clk_out(&pf->hw, out_idx - REF1P, &port_num, + &flags, &freq); + + if (!ret && (flags & ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN)) + *ena = true; + else + *ena = false; + + return ice_status_to_errno(ret); +} + /** * ice_down - Shutdown the connection * @vsi: The VSI being stopped @@ -8647,4 +8735,7 @@ static const struct net_device_ops ice_netdev_ops = { .ndo_xsk_wakeup = ice_xsk_wakeup, .ndo_get_eec_state = ice_get_eec_state, .ndo_get_eec_src = ice_get_eec_src, + .ndo_get_rclk_range = ice_get_rclk_range, + .ndo_set_rclk_out = ice_set_rclk_out, + .ndo_get_rclk_state = ice_get_rclk_state, }; diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 708bd8336155..9faa005506d1 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1351,6 +1351,17 @@ struct netdev_net_notifier { * struct netlink_ext_ack *extack); * Get the index of the source signal that's currently used as EEC's * reference + * int (*ndo_get_rclk_range)(struct net_device *dev, u32 *min_idx, u32 *max_idx, + * struct netlink_ext_ack *extack); + * Get range of valid output indices for the set/get Recovered Clock + * functions + * int (*ndo_set_rclk_out)(struct net_device *dev, u32 out_idx, bool ena, + * struct netlink_ext_ack *extack); + * Set the receive clock recovery redirection to a given Recovered Clock + * output. + * int (*ndo_get_rclk_state)(struct net_device *dev, u32 out_idx, bool *ena, + * struct netlink_ext_ack *extack); + * Get current state of the recovered clock to pin mapping. */ struct net_device_ops { int (*ndo_init)(struct net_device *dev); -- 2.26.3 From maciej.machnikowski at intel.com Fri Nov 5 20:53:31 2021 From: maciej.machnikowski at intel.com (Maciej Machnikowski) Date: Fri, 5 Nov 2021 21:53:31 +0100 Subject: [Intel-wired-lan] [PATCH v2 net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211105205331.2024623-1-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> Message-ID: <20211105205331.2024623-7-maciej.machnikowski@intel.com> Add Documentation/networking/synce.rst describing new RTNL messages and respective NDO ops supporting SyncE (Synchronous Ethernet). Signed-off-by: Maciej Machnikowski --- Documentation/networking/synce.rst | 117 +++++++++++++++++++++++++++++ 1 file changed, 117 insertions(+) create mode 100644 Documentation/networking/synce.rst diff --git a/Documentation/networking/synce.rst b/Documentation/networking/synce.rst new file mode 100644 index 000000000000..4ca41fb9a481 --- /dev/null +++ b/Documentation/networking/synce.rst @@ -0,0 +1,117 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Synchronous Ethernet +==================== + +Synchronous Ethernet networks use a physical layer clock to syntonize +the frequency across different network elements. + +Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet +Equipment Clock (EEC) and a PHY that has dedicated outputs of recovered clocks +and a dedicated TX clock input that is used as to transmit data to other nodes. + +The SyncE capable PHY is able to recover the incomning frequency of the data +stream on RX lanes and redirect it (sometimes dividing it) to recovered +clock outputs. In SyncE PHY the TX frequency is directly dependent on the +input frequency - either on the PHY CLK input, or on a dedicated +TX clock input. + + ???????????????????????? + ? RX ? TX ? + 1 ? lanes ? lanes ? 1 + ???????????? ? ??????? + 2 ? ? ? ? 2 + ???????? ? ? ??????? + 3 ? ? ? ? ? 3 + ???????? ? ? ??????? + ? ?????? ? ? + ? \____/ ? ? + ???????????????????????? + 1? 2? ? + RCLK out? ? ? TX CLK in + ? ? ? + ??????????????????? + ? ? + ? EEC ? + ? ? + ??????????????????? + +The EEC can synchronize its frequency to one of the synchronization inputs +either clocks recovered on traffic interfaces or (in advanced deployments) +external frequency sources. + +Some EEC implementations can select synchronization source through +priority tables and synchronization status messaging and provide necessary +filtering and holdover capabilities. + +The following interface can be applicable to diffferent packet network types +following ITU-T G.8261/G.8262 recommendations. + +Interface +========= + +The following RTNL messages are used to read/configure SyncE recovered +clocks. + +RTM_GETRCLKRANGE +----------------- +Reads the allowed pin index range for the recovered clock outputs. +This can be aligned to PHY outputs or to EEC inputs, whichever is +better for a given application. +Will call the ndo_get_rclk_range function to read the allowed range +of output pin indexes. +Will call ndo_get_rclk_range to determine the allowed recovered clock +range and return them in the IFLA_RCLK_RANGE_MIN_PIN and the +IFLA_RCLK_RANGE_MAX_PIN attributes + +RTM_GETRCLKSTATE +----------------- +Read the state of recovered pins that output recovered clock from +a given port. The message will contain the number of assigned clocks +(IFLA_RCLK_STATE_COUNT) and an N pin indexes in IFLA_RCLK_STATE_OUT_IDX +To support multiple recovered clock outputs from the same port, this message +will return the IFLA_RCLK_STATE_COUNT attribute containing the number of +active recovered clock outputs (N) and N IFLA_RCLK_STATE_OUT_IDX attributes +listing the active output indexes. +This message will call the ndo_get_rclk_range to determine the allowed +recovered clock indexes and then will loop through them, calling +the ndo_get_rclk_state for each of them. + +RTM_SETRCLKSTATE +----------------- +Sets the redirection of the recovered clock for a given pin. This message +expects one attribute: +struct if_set_rclk_msg { + __u32 ifindex; /* interface index */ + __u32 out_idx; /* output index (from a valid range) + __u32 flags; /* configuration flags */ +}; + +Supported flags are: +SET_RCLK_FLAGS_ENA - if set in flags - the given output will be enabled, + if clear - the output will be disabled. + +RTM_GETEECSTATE +---------------- +Reads the state of the EEC or equivalent physical clock synchronizer. +This message returns the following attributes: +IFLA_EEC_STATE - current state of the EEC or equivalent clock generator. + The states returned in this attribute are aligned to the + ITU-T G.781 and are: + IF_EEC_STATE_INVALID - state is not valid + IF_EEC_STATE_FREERUN - clock is free-running + IF_EEC_STATE_LOCKED - clock is locked to the reference, + but the holdover memory is not valid + IF_EEC_STATE_LOCKED_HO_ACQ - clock is locked to the reference + and holdover memory is valid + IF_EEC_STATE_HOLDOVER - clock is in holdover mode +State is read from the netdev calling the: +int (*ndo_get_eec_state)(struct net_device *dev, enum if_eec_state *state, + u32 *src_idx, struct netlink_ext_ack *extack); + +IFLA_EEC_SRC_IDX - optional attribute returning the index of the reference that + is used for the current IFLA_EEC_STATE, i.e., the index of + the pin that the EEC is locked to. + +Will be returned only if the ndo_get_eec_src is implemented. \ No newline at end of file -- 2.26.3 From kuba at kernel.org Fri Nov 5 21:30:13 2021 From: kuba at kernel.org (Jakub Kicinski) Date: Fri, 5 Nov 2021 14:30:13 -0700 Subject: [Intel-wired-lan] [PATCH net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-7-maciej.machnikowski@intel.com> <20211104110855.3ead1642@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> Message-ID: <20211105143013.2cded2f3@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> On Fri, 5 Nov 2021 11:51:48 +0000 Machnikowski, Maciej wrote: > > I'm still struggling to understand your reasoning around not making > > EEC its own object. "We can do this later" seems like trading > > relatively little effort now for extra work for driver and application > > developers for ever. > > That's not the case. We need EEC and the other subsystem we wanted > to make is the DPLL subsystem. While EEC can be a DPLL - it doesn't have > to, and it's also the other way round - the DPLL can have numerous different > usages. We wanted to create a DPLL object to the extent that as a SW guy I don't understand the difference between that and an EEC. Whatever category of *PLL etc. objects EEC is, that's what we want to model. > When we add the DPLL subsystem support the future work will be as simple > as routing the EEC state read function to the DPLL subsystem. But if someone > decides to use a different HW implementation he will still be able to > implement his own version of API to handle it without a bigger DPLL block All we want is something that's not a port to hang whatever attributes exist in RTM_GETEECSTATE. From maciej.machnikowski at intel.com Sat Nov 6 00:01:02 2021 From: maciej.machnikowski at intel.com (Machnikowski, Maciej) Date: Sat, 6 Nov 2021 00:01:02 +0000 Subject: [Intel-wired-lan] [PATCH net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211105143013.2cded2f3@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-7-maciej.machnikowski@intel.com> <20211104110855.3ead1642@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> <20211105143013.2cded2f3@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> Message-ID: > -----Original Message----- > From: Jakub Kicinski > Sent: Friday, November 5, 2021 10:30 PM > To: Machnikowski, Maciej > Subject: Re: [PATCH net-next 6/6] docs: net: Add description of SyncE > interfaces > > On Fri, 5 Nov 2021 11:51:48 +0000 Machnikowski, Maciej wrote: > > > I'm still struggling to understand your reasoning around not making > > > EEC its own object. "We can do this later" seems like trading > > > relatively little effort now for extra work for driver and application > > > developers for ever. > > > > That's not the case. We need EEC and the other subsystem we wanted > > to make is the DPLL subsystem. While EEC can be a DPLL - it doesn't have > > to, and it's also the other way round - the DPLL can have numerous > different > > usages. > > We wanted to create a DPLL object to the extent that as a SW guy > I don't understand the difference between that and an EEC. Whatever > category of *PLL etc. objects EEC is, that's what we want to model. The DPLL has more uses than just EEC. I.e. Timing card uses one to generate different frequencies synchronized to 1PPS coming from the GNSS receiver. Implementing the whole DPLL subsystem may be an overkill for some basic solutions that are embedded inside the PHY and only handle the syntonization of TX frequency to the RX one. In this case all they would report is the current state. > > When we add the DPLL subsystem support the future work will be as > simple > > as routing the EEC state read function to the DPLL subsystem. But if > someone > > decides to use a different HW implementation he will still be able to > > implement his own version of API to handle it without a bigger DPLL block > > All we want is something that's not a port to hang whatever attributes > exist in RTM_GETEECSTATE. Routing to the DPLL object will be a specific use-case required only if we support advanced cases with external sources of frequency (like an atomic clock). From idosch at idosch.org Sun Nov 7 13:44:52 2021 From: idosch at idosch.org (Ido Schimmel) Date: Sun, 7 Nov 2021 15:44:52 +0200 Subject: [Intel-wired-lan] [PATCH v2 net-next 2/6] rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status In-Reply-To: <20211105205331.2024623-3-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> <20211105205331.2024623-3-maciej.machnikowski@intel.com> Message-ID: On Fri, Nov 05, 2021 at 09:53:27PM +0100, Maciej Machnikowski wrote: > +/* SyncE section */ > + > +enum if_eec_state { > + IF_EEC_STATE_INVALID = 0, /* state is not valid */ > + IF_EEC_STATE_FREERUN, /* clock is free-running */ > + IF_EEC_STATE_LOCKED, /* clock is locked to the reference, > + * but the holdover memory is not valid > + */ > + IF_EEC_STATE_LOCKED_HO_ACQ, /* clock is locked to the reference > + * and holdover memory is valid > + */ > + IF_EEC_STATE_HOLDOVER, /* clock is in holdover mode */ > +}; > + > +#define EEC_SRC_PORT (1 << 0) /* recovered clock from the port is > + * currently the source for the EEC > + */ Where is this used? Note that the merge window is open and that net-next is closed: http://vger.kernel.org/~davem/net-next.html > + > +struct if_eec_state_msg { > + __u32 ifindex; > +}; > + > +enum { > + IFLA_EEC_UNSPEC, > + IFLA_EEC_STATE, > + IFLA_EEC_SRC_IDX, > + __IFLA_EEC_MAX, > +}; > + > +#define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) From idosch at idosch.org Sun Nov 7 14:08:44 2021 From: idosch at idosch.org (Ido Schimmel) Date: Sun, 7 Nov 2021 16:08:44 +0200 Subject: [Intel-wired-lan] [PATCH v2 net-next 6/6] docs: net: Add description of SyncE interfaces In-Reply-To: <20211105205331.2024623-7-maciej.machnikowski@intel.com> References: <20211105205331.2024623-1-maciej.machnikowski@intel.com> <20211105205331.2024623-7-maciej.machnikowski@intel.com> Message-ID: On Fri, Nov 05, 2021 at 09:53:31PM +0100, Maciej Machnikowski wrote: > Add Documentation/networking/synce.rst describing new RTNL messages > and respective NDO ops supporting SyncE (Synchronous Ethernet). > > Signed-off-by: Maciej Machnikowski > --- > Documentation/networking/synce.rst | 117 +++++++++++++++++++++++++++++ > 1 file changed, 117 insertions(+) > create mode 100644 Documentation/networking/synce.rst > > diff --git a/Documentation/networking/synce.rst b/Documentation/networking/synce.rst > new file mode 100644 > index 000000000000..4ca41fb9a481 > --- /dev/null > +++ b/Documentation/networking/synce.rst > @@ -0,0 +1,117 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +==================== > +Synchronous Ethernet > +==================== > + > +Synchronous Ethernet networks use a physical layer clock to syntonize > +the frequency across different network elements. > + > +Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet > +Equipment Clock (EEC) and a PHY that has dedicated outputs of recovered clocks > +and a dedicated TX clock input that is used as to transmit data to other nodes. > + > +The SyncE capable PHY is able to recover the incomning frequency of the data > +stream on RX lanes and redirect it (sometimes dividing it) to recovered > +clock outputs. In SyncE PHY the TX frequency is directly dependent on the > +input frequency - either on the PHY CLK input, or on a dedicated > +TX clock input. > + > + ???????????????????????? > + ? RX ? TX ? > + 1 ? lanes ? lanes ? 1 > + ???????????? ? ??????? > + 2 ? ? ? ? 2 > + ???????? ? ? ??????? > + 3 ? ? ? ? ? 3 > + ???????? ? ? ??????? > + ? ?????? ? ? > + ? \____/ ? ? > + ???????????????????????? > + 1? 2? ? > + RCLK out? ? ? TX CLK in > + ? ? ? > + ??????????????????? > + ? ? > + ? EEC ? > + ? ? > + ??????????????????? > + > +The EEC can synchronize its frequency to one of the synchronization inputs > +either clocks recovered on traffic interfaces or (in advanced deployments) > +external frequency sources. > + > +Some EEC implementations can select synchronization source through > +priority tables and synchronization status messaging and provide necessary > +filtering and holdover capabilities. > + > +The following interface can be applicable to diffferent packet network types > +following ITU-T G.8261/G.8262 recommendations. > + > +Interface > +========= > + > +The following RTNL messages are used to read/configure SyncE recovered > +clocks. > + > +RTM_GETRCLKRANGE > +----------------- > +Reads the allowed pin index range for the recovered clock outputs. > +This can be aligned to PHY outputs or to EEC inputs, whichever is > +better for a given application. Can you explain the difference between PHY outputs and EEC inputs? It is no clear to me from the diagram. How would the diagram look in a multi-port adapter where you have a single EEC? > +Will call the ndo_get_rclk_range function to read the allowed range > +of output pin indexes. > +Will call ndo_get_rclk_range to determine the allowed recovered clock > +range and return them in the IFLA_RCLK_RANGE_MIN_PIN and the > +IFLA_RCLK_RANGE_MAX_PIN attributes The first sentence seems to be redundant > + > +RTM_GETRCLKSTATE > +----------------- > +Read the state of recovered pins that output recovered clock from > +a given port. The message will contain the number of assigned clocks > +(IFLA_RCLK_STATE_COUNT) and an N pin indexes in IFLA_RCLK_STATE_OUT_IDX > +To support multiple recovered clock outputs from the same port, this message > +will return the IFLA_RCLK_STATE_COUNT attribute containing the number of > +active recovered clock outputs (N) and N IFLA_RCLK_STATE_OUT_IDX attributes > +listing the active output indexes. > +This message will call the ndo_get_rclk_range to determine the allowed > +recovered clock indexes and then will loop through them, calling > +the ndo_get_rclk_state for each of them. Why do you need both RTM_GETRCLKRANGE and RTM_GETRCLKSTATE? Isn't RTM_GETRCLKSTATE enough? Instead of skipping over "disabled" pins in the range IFLA_RCLK_RANGE_MIN_PIN..IFLA_RCLK_RANGE_MAX_PIN, just report the state (enabled / disable) for all > + > +RTM_SETRCLKSTATE > +----------------- > +Sets the redirection of the recovered clock for a given pin. This message > +expects one attribute: > +struct if_set_rclk_msg { > + __u32 ifindex; /* interface index */ > + __u32 out_idx; /* output index (from a valid range) > + __u32 flags; /* configuration flags */ > +}; > + > +Supported flags are: > +SET_RCLK_FLAGS_ENA - if set in flags - the given output will be enabled, > + if clear - the output will be disabled. In the diagram you have two recovered clock outputs going into the EEC. According to which the EEC is synchronized? How does user space know which pins to enable? > + > +RTM_GETEECSTATE > +---------------- > +Reads the state of the EEC or equivalent physical clock synchronizer. > +This message returns the following attributes: > +IFLA_EEC_STATE - current state of the EEC or equivalent clock generator. > + The states returned in this attribute are aligned to the > + ITU-T G.781 and are: > + IF_EEC_STATE_INVALID - state is not valid > + IF_EEC_STATE_FREERUN - clock is free-running > + IF_EEC_STATE_LOCKED - clock is locked to the reference, > + but the holdover memory is not valid > + IF_EEC_STATE_LOCKED_HO_ACQ - clock is locked to the reference > + and holdover memory is valid > + IF_EEC_STATE_HOLDOVER - clock is in holdover mode > +State is read from the netdev calling the: > +int (*ndo_get_eec_state)(struct net_device *dev, enum if_eec_state *state, > + u32 *src_idx, struct netlink_ext_ack *extack); > + > +IFLA_EEC_SRC_IDX - optional attribute returning the index of the reference that > + is used for the current IFLA_EEC_STATE, i.e., the index of > + the pin that the EEC is locked to. > + > +Will be returned only if the ndo_get_eec_src is implemented. > \ No newline at end of file > -- > 2.26.3 > From idosch at idosch.org Sun Nov 7 14:21:12 2021 From: idosch at idosch.org (Ido Schimmel) Date: Sun, 7 Nov 2021 16:21:12 +0200 Subject: [Intel-wired-lan] [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered clock configuration In-Reply-To: References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-5-maciej.machnikowski@intel.com> <2d379392-a381-e60a-7658-5ac695c30df1@nvidia.com> Message-ID: On Fri, Nov 05, 2021 at 12:17:19PM +0000, Machnikowski, Maciej wrote: > > > > -----Original Message----- > > From: Roopa Prabhu > > Sent: Thursday, November 4, 2021 7:25 PM > > To: Machnikowski, Maciej ; > > netdev at vger.kernel.org; intel-wired-lan at lists.osuosl.org > > Cc: richardcochran at gmail.com; abyagowi at fb.com; Nguyen, Anthony L > > ; davem at davemloft.net; kuba at kernel.org; > > linux-kselftest at vger.kernel.org; idosch at idosch.org; mkubecek at suse.cz; > > saeed at kernel.org; michael.chan at broadcom.com > > Subject: Re: [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered > > clock configuration > > > > > > On 11/4/21 1:12 AM, Maciej Machnikowski wrote: > > > Add support for RTNL messages for reading/configuring SyncE recovered > > > clocks. > > > The messages are: > > > RTM_GETRCLKRANGE: Reads the allowed pin index range for the > > recovered > > > clock outputs. This can be aligned to PHY outputs or > > > to EEC inputs, whichever is better for a given > > > application > > > > > > RTM_GETRCLKSTATE: Read the state of recovered pins that output > > recovered > > > clock from a given port. The message will contain the > > > number of assigned clocks (IFLA_RCLK_STATE_COUNT) and > > > a N pin inexes in IFLA_RCLK_STATE_OUT_IDX > > > > > > RTM_SETRCLKSTATE: Sets the redirection of the recovered clock for > > > a given pin > > > > > > Signed-off-by: Maciej Machnikowski > > > --- > > > > > > Can't we just use a single RTM msg with nested attributes ? > > > > With separate RTM msgtype for each syncE attribute we will end up > > bloating the RTM msg namespace. > > > > (these api's could also be in ethtool given its directly querying the > > drivers) > > I'm not a fan of merging those messages. The mergeable ones are > GETRCLKRANGE and GETCLKSTATE, but the get range function may be > result in a significantly longer call if the information about the underlying > HW require any HW calls. > They are currently grouped in 3 categories: > - reading the boundaries in GetRclkRange (we can later add more to it, like > configurable frequency limits) > - Reading current configuration > - setting the required configuration > > I don't plan adding any additional RTM msg types for those (and that's > the reason why I pulled them before EEC state which may have more > messages in the future) > > We also discussed ethtool way in the past RFCs, but this concept > is applicable to any transport layer so I'd rather not limit it to ethernet > devices (i.e. SONET, infiniband and others). I'm still not convinced that this doesn't belong in ethtool. I find it very weird to have a message called "Get Ethernet Equipment Clock State" in rtnetlink and not in ethtool. I also believe it was a mistake to add DCB to rtnetlink (for example, why PAUSE is configured via ethtool, but PFC via rtnetlink?) From roopa at nvidia.com Thu Nov 4 18:24:46 2021 From: roopa at nvidia.com (Roopa Prabhu) Date: Thu, 4 Nov 2021 11:24:46 -0700 Subject: [Intel-wired-lan] [PATCH net-next 4/6] rtnetlink: Add support for SyncE recovered clock configuration In-Reply-To: <20211104081231.1982753-5-maciej.machnikowski@intel.com> References: <20211104081231.1982753-1-maciej.machnikowski@intel.com> <20211104081231.1982753-5-maciej.machnikowski@intel.com> Message-ID: <2d379392-a381-e60a-7658-5ac695c30df1@nvidia.com> On 11/4/21 1:12 AM, Maciej Machnikowski wrote: > Add support for RTNL messages for reading/configuring SyncE recovered > clocks. > The messages are: > RTM_GETRCLKRANGE: Reads the allowed pin index range for the recovered > clock outputs. This can be aligned to PHY outputs or > to EEC inputs, whichever is better for a given > application > > RTM_GETRCLKSTATE: Read the state of recovered pins that output recovered > clock from a given port. The message will contain the > number of assigned clocks (IFLA_RCLK_STATE_COUNT) and > a N pin inexes in IFLA_RCLK_STATE_OUT_IDX > > RTM_SETRCLKSTATE: Sets the redirection of the recovered clock for > a given pin > > Signed-off-by: Maciej Machnikowski > --- Can't we just use a single RTM msg with nested attributes ? With separate RTM msgtype for each syncE attribute we will end up bloating the RTM msg namespace. (these api's could also be in ethtool given its directly querying the drivers) > include/linux/netdevice.h | 9 ++ > include/uapi/linux/if_link.h | 26 +++++ > include/uapi/linux/rtnetlink.h | 7 ++ > net/core/rtnetlink.c | 174 +++++++++++++++++++++++++++++++++ > security/selinux/nlmsgtab.c | 3 + > 5 files changed, 219 insertions(+) > > diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h > index ef2b381dae0c..708bd8336155 100644 > --- a/include/linux/netdevice.h > +++ b/include/linux/netdevice.h > @@ -1576,6 +1576,15 @@ struct net_device_ops { > int (*ndo_get_eec_src)(struct net_device *dev, > u32 *src, > struct netlink_ext_ack *extack); > + int (*ndo_get_rclk_range)(struct net_device *dev, > + u32 *min_idx, u32 *max_idx, > + struct netlink_ext_ack *extack); > + int (*ndo_set_rclk_out)(struct net_device *dev, > + u32 out_idx, bool ena, > + struct netlink_ext_ack *extack); > + int (*ndo_get_rclk_state)(struct net_device *dev, > + u32 out_idx, bool *ena, > + struct netlink_ext_ack *extack); > }; > > /** > diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h > index 8eae80f287e9..e27c153cfba3 100644 > --- a/include/uapi/linux/if_link.h > +++ b/include/uapi/linux/if_link.h > @@ -1304,4 +1304,30 @@ enum { > > #define IFLA_EEC_MAX (__IFLA_EEC_MAX - 1) > > +struct if_rclk_range_msg { > + __u32 ifindex; > +}; > + > +enum { > + IFLA_RCLK_RANGE_UNSPEC, > + IFLA_RCLK_RANGE_MIN_PIN, > + IFLA_RCLK_RANGE_MAX_PIN, > + __IFLA_RCLK_RANGE_MAX, > +}; > + > +struct if_set_rclk_msg { > + __u32 ifindex; > + __u32 out_idx; > + __u32 flags; > +}; > + > +#define SET_RCLK_FLAGS_ENA (1U << 0) > + > +enum { > + IFLA_RCLK_STATE_UNSPEC, > + IFLA_RCLK_STATE_OUT_IDX, > + IFLA_RCLK_STATE_COUNT, > + __IFLA_RCLK_STATE_MAX, > +}; > + > #endif /* _UAPI_LINUX_IF_LINK_H */ > diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h > index 1d8662afd6bd..6c0d96d56ec7 100644 > --- a/include/uapi/linux/rtnetlink.h > +++ b/include/uapi/linux/rtnetlink.h > @@ -185,6 +185,13 @@ enum { > RTM_GETNEXTHOPBUCKET, > #define RTM_GETNEXTHOPBUCKET RTM_GETNEXTHOPBUCKET > > + RTM_GETRCLKRANGE = 120, > +#define RTM_GETRCLKRANGE RTM_GETRCLKRANGE > + RTM_GETRCLKSTATE = 121, > +#define RTM_GETRCLKSTATE RTM_GETRCLKSTATE > + RTM_SETRCLKSTATE = 122, > +#define RTM_SETRCLKSTATE RTM_SETRCLKSTATE > + > RTM_GETEECSTATE = 124, > #define RTM_GETEECSTATE RTM_GETEECSTATE > > diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c > index 03bc773d0e69..bc1e050f6d38 100644 > --- a/net/core/rtnetlink.c > +++ b/net/core/rtnetlink.c > @@ -5544,6 +5544,176 @@ static int rtnl_eec_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, > return err; > } > > +static int rtnl_fill_rclk_range(struct sk_buff *skb, struct net_device *dev, > + u32 portid, u32 seq, > + struct netlink_callback *cb, int flags, > + struct netlink_ext_ack *extack) > +{ > + const struct net_device_ops *ops = dev->netdev_ops; > + struct if_rclk_range_msg *state_msg; > + struct nlmsghdr *nlh; > + u32 min_idx, max_idx; > + int err; > + > + ASSERT_RTNL(); > + > + if (!ops->ndo_get_rclk_range) > + return -EOPNOTSUPP; > + > + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); > + if (err) > + return err; > + > + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKRANGE, sizeof(*state_msg), > + flags); > + if (!nlh) > + return -EMSGSIZE; > + > + state_msg = nlmsg_data(nlh); > + state_msg->ifindex = dev->ifindex; > + > + if (nla_put_u32(skb, IFLA_RCLK_RANGE_MIN_PIN, min_idx) || > + nla_put_u32(skb, IFLA_RCLK_RANGE_MAX_PIN, max_idx)) > + return -EMSGSIZE; > + > + nlmsg_end(skb, nlh); > + return 0; > +} > + > +static int rtnl_rclk_range_get(struct sk_buff *skb, struct nlmsghdr *nlh, > + struct netlink_ext_ack *extack) > +{ > + struct net *net = sock_net(skb->sk); > + struct if_eec_state_msg *state; > + struct net_device *dev; > + struct sk_buff *nskb; > + int err; > + > + state = nlmsg_data(nlh); > + dev = __dev_get_by_index(net, state->ifindex); > + if (!dev) { > + NL_SET_ERR_MSG(extack, "unknown ifindex"); > + return -ENODEV; > + } > + > + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); > + if (!nskb) > + return -ENOBUFS; > + > + err = rtnl_fill_rclk_range(nskb, dev, NETLINK_CB(skb).portid, > + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, > + extack); > + if (err < 0) > + kfree_skb(nskb); > + else > + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); > + > + return err; > +} > + > +static int rtnl_fill_rclk_state(struct sk_buff *skb, struct net_device *dev, > + u32 portid, u32 seq, > + struct netlink_callback *cb, int flags, > + struct netlink_ext_ack *extack) > +{ > + const struct net_device_ops *ops = dev->netdev_ops; > + u32 min_idx, max_idx, src_idx, count = 0; > + struct if_eec_state_msg *state_msg; > + struct nlmsghdr *nlh; > + bool ena; > + int err; > + > + ASSERT_RTNL(); > + > + if (!ops->ndo_get_rclk_state || !ops->ndo_get_rclk_range) > + return -EOPNOTSUPP; > + > + err = ops->ndo_get_rclk_range(dev, &min_idx, &max_idx, extack); > + if (err) > + return err; > + > + nlh = nlmsg_put(skb, portid, seq, RTM_GETRCLKSTATE, sizeof(*state_msg), > + flags); > + if (!nlh) > + return -EMSGSIZE; > + > + state_msg = nlmsg_data(nlh); > + state_msg->ifindex = dev->ifindex; > + > + for (src_idx = min_idx; src_idx <= max_idx; src_idx++) { > + ops->ndo_get_rclk_state(dev, src_idx, &ena, extack); > + if (!ena) > + continue; > + > + if (nla_put_u32(skb, IFLA_RCLK_STATE_OUT_IDX, src_idx)) > + return -EMSGSIZE; > + count++; > + } > + > + if (nla_put_u32(skb, IFLA_RCLK_STATE_COUNT, count)) > + return -EMSGSIZE; > + > + nlmsg_end(skb, nlh); > + return 0; > +} > + > +static int rtnl_rclk_state_get(struct sk_buff *skb, struct nlmsghdr *nlh, > + struct netlink_ext_ack *extack) > +{ > + struct net *net = sock_net(skb->sk); > + struct if_eec_state_msg *state; > + struct net_device *dev; > + struct sk_buff *nskb; > + int err; > + > + state = nlmsg_data(nlh); > + dev = __dev_get_by_index(net, state->ifindex); > + if (!dev) { > + NL_SET_ERR_MSG(extack, "unknown ifindex"); > + return -ENODEV; > + } > + > + nskb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); > + if (!nskb) > + return -ENOBUFS; > + > + err = rtnl_fill_rclk_state(nskb, dev, NETLINK_CB(skb).portid, > + nlh->nlmsg_seq, NULL, nlh->nlmsg_flags, > + extack); > + if (err < 0) > + kfree_skb(nskb); > + else > + err = rtnl_unicast(nskb, net, NETLINK_CB(skb).portid); > + > + return err; > +} > + > +static int rtnl_rclk_set(struct sk_buff *skb, struct nlmsghdr *nlh, > + struct netlink_ext_ack *extack) > +{ > + struct net *net = sock_net(skb->sk); > + struct if_set_rclk_msg *state; > + struct net_device *dev; > + bool ena; > + int err; > + > + state = nlmsg_data(nlh); > + dev = __dev_get_by_index(net, state->ifindex); > + if (!dev) { > + NL_SET_ERR_MSG(extack, "unknown ifindex"); > + return -ENODEV; > + } > + > + if (!dev->netdev_ops->ndo_set_rclk_out) > + return -EOPNOTSUPP; > + > + ena = !!(state->flags & SET_RCLK_FLAGS_ENA); > + err = dev->netdev_ops->ndo_set_rclk_out(dev, state->out_idx, ena, > + extack); > + > + return err; > +} > + > /* Process one rtnetlink message. */ > > static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, > @@ -5770,5 +5940,9 @@ void __init rtnetlink_init(void) > rtnl_register(PF_UNSPEC, RTM_GETSTATS, rtnl_stats_get, rtnl_stats_dump, > 0); > > + rtnl_register(PF_UNSPEC, RTM_GETRCLKRANGE, rtnl_rclk_range_get, NULL, 0); > + rtnl_register(PF_UNSPEC, RTM_GETRCLKSTATE, rtnl_rclk_state_get, NULL, 0); > + rtnl_register(PF_UNSPEC, RTM_SETRCLKSTATE, rtnl_rclk_set, NULL, 0); > + > rtnl_register(PF_UNSPEC, RTM_GETEECSTATE, rtnl_eec_state_get, NULL, 0); > } > diff --git a/security/selinux/nlmsgtab.c b/security/selinux/nlmsgtab.c > index 2c66e722ea9c..57c7c85edd4d 100644 > --- a/security/selinux/nlmsgtab.c > +++ b/security/selinux/nlmsgtab.c > @@ -91,6 +91,9 @@ static const struct nlmsg_perm nlmsg_route_perms[] = > { RTM_NEWNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, > { RTM_DELNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, > { RTM_GETNEXTHOPBUCKET, NETLINK_ROUTE_SOCKET__NLMSG_READ }, > + { RTM_GETRCLKRANGE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, > + { RTM_GETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, > + { RTM_SETRCLKSTATE, NETLINK_ROUTE_SOCKET__NLMSG_WRITE }, > { RTM_GETEECSTATE, NETLINK_ROUTE_SOCKET__NLMSG_READ }, > }; >