[Intel-wired-lan] [PATCH] e1000e: Print PHY register address when MDI read/write fails
Paul Menzel
pmenzel at molgen.mpg.de
Wed Feb 9 16:54:25 UTC 2022
Dear Chen,
First, your system time is incorrect, and the message date from the future.
Am 10.02.22 um 00:43 schrieb Chen Yu:
> There is occasional suspend error from e1000e which blocks the
> system from further suspending:
Please add a blank line here.
Also, please document the specific board/configuration in question.
> [ 20.078957] PM: pci_pm_suspend(): e1000e_pm_suspend+0x0/0x780 [e1000e] returns -2
> [ 20.078970] PM: dpm_run_callback(): pci_pm_suspend+0x0/0x170 returns -2
> [ 20.078974] e1000e 0000:00:1f.6: PM: pci_pm_suspend+0x0/0x170 returned -2 after 371012 usecs
> [ 20.078978] e1000e 0000:00:1f.6: PM: failed to suspend async: error -2
Please add a blank line her.e
> According to the code flow, this might be caused by broken MDI read/write to PHY registers.
> However currently the code does not tell us which register is broken. Thus enhance the debug
> information to print the offender PHY register for easier debugging.
Please reflow for 75 characters per line, and maybe even paste the new
messages, if you have a system, where you can reproduce that on.
> Reported-by: Todd Brandt <todd.e.brandt at intel.com>
> Signed-off-by: Chen Yu <yu.c.chen at intel.com>
> ---
> drivers/net/ethernet/intel/e1000e/phy.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
> index 0f0efee5fc8e..fd07c3679bb1 100644
> --- a/drivers/net/ethernet/intel/e1000e/phy.c
> +++ b/drivers/net/ethernet/intel/e1000e/phy.c
> @@ -146,11 +146,11 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
> break;
> }
> if (!(mdic & E1000_MDIC_READY)) {
> - e_dbg("MDI Read did not complete\n");
> + e_dbg("MDI Read PHY Reg Address %d did not complete\n", offset);
> return -E1000_ERR_PHY;
> }
> if (mdic & E1000_MDIC_ERROR) {
> - e_dbg("MDI Error\n");
> + e_dbg("MDI Read PHY Reg Address %d Error\n", offset);
> return -E1000_ERR_PHY;
> }
> if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {
> @@ -210,11 +210,11 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
> break;
> }
> if (!(mdic & E1000_MDIC_READY)) {
> - e_dbg("MDI Write did not complete\n");
> + e_dbg("MDI Write PHY Reg Address %d did not complete\n", offset);
> return -E1000_ERR_PHY;
> }
> if (mdic & E1000_MDIC_ERROR) {
> - e_dbg("MDI Error\n");
> + e_dbg("MDI Write PHY Red Address %d Error\n", offset);
> return -E1000_ERR_PHY;
> }
> if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {
Acked-by: Paul Menzel <pmenzel at molgen.mpg.de>
Kind regards,
Paul
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