[Intel-wired-lan] [PATCH net] ice: make writes to /dev/gnssX synchronous

Kolacinski, Karol karol.kolacinski at intel.com
Wed Mar 29 09:58:54 UTC 2023


Hi Michal,

Thank you for your patch - we really like it but need some further
investigation and deep testing.

>  - The GNSS write_raw operation is supposed to be synchronous[1][2].

Synchronous writes were present in first design but we experienced
multiple issues due to the asynchronous nature of our SW -> I2C
interface.
In the case of this patch, I experience terminal and gpsd hang and errors.
We need to check it on more different systems.

>  - There is no upper bound on the number of pending writes.
>    Userspace can submit writes much faster than the driver can process,
>    consuming unlimited amounts of kernel memory.
> 
>  - The possibility of waiting for a very long time to flush the write
>    work when doing rmmod, softlockups.

This will happen anyway, because I2C writes are using AQ. This is done
in a loop, AQ write can sleep etc.

Kind regards,
Karol Kolacinski


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