[Intel-wired-lan] [PATCH v10 iwl-next 02/12] ice: Introduce helper to get tmr_cmd_reg values
Pucha, HimasekharX Reddy
himasekharx.reddy.pucha at intel.com
Fri May 17 07:30:16 UTC 2024
> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces at osuosl.org> On Behalf Of Karol Kolacinski
> Sent: Wednesday, April 24, 2024 7:00 PM
> To: intel-wired-lan at lists.osuosl.org
> Cc: netdev at vger.kernel.org; Kubalewski, Arkadiusz <arkadiusz.kubalewski at intel.com>; Kolacinski, Karol <karol.kolacinski at intel.com>; Nguyen, Anthony L <anthony.l.nguyen at intel.com>; Kitszel, Przemyslaw <przemyslaw.kitszel at intel.com>; Keller, Jacob E <jacob.e.keller at intel.com>
> Subject: [Intel-wired-lan] [PATCH v10 iwl-next 02/12] ice: Introduce helper to get tmr_cmd_reg values
>
> From: Jacob Keller <jacob.e.keller at intel.com>
>
> Multiple places in the driver code need to convert enum ice_ptp_tmr_cmd values into register bits for both the main timer and the PHY port timers. The main MAC register has one bit scheme for timer commands, while the PHY commands use a different scheme.
>
> The E810 and E830 devices use the same scheme for port commands as used for the main timer. However, E822 and ETH56G hardware has a separate scheme used by the PHY.
>
> Introduce helper functions to convert the timer command enumeration into the register values, reducing some code duplication, and making it easier to later refactor the individual port write commands.
>
> Signed-off-by: Jacob Keller <jacob.e.keller at intel.com>
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel at intel.com>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski at intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski at intel.com>
> ---
> V4 -> V5: Changed operation sequence to shift tmr_idx instead of cmd_val
>
> drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 140 ++++++++++++--------
> drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 +-
> 2 files changed, 89 insertions(+), 53 deletions(-)
>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha at intel.com> (A Contingent worker at Intel)
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