[Intel-wired-lan] [PATCH v4 iwl-net 2/4] ice: Fix quad registers read on E825

[Pucha, HimasekharX Reddy]

> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces at osuosl.org> On Behalf Of Grzegorz Nitka
> Sent: 05 November 2024 17:59
> To: intel-wired-lan at lists.osuosl.org
> Cc: netdev at vger.kernel.org; Kubalewski, Arkadiusz <arkadiusz.kubalewski at intel.com>; Kolacinski, Karol <karol.kolacinski at intel.com>; Nguyen, Anthony L <anthony.l.nguyen at intel.com>; Kitszel, Przemyslaw <przemyslaw.kitszel at intel.com>
> Subject: [Intel-wired-lan] [PATCH v4 iwl-net 2/4] ice: Fix quad registers read on E825
>
> From: Karol Kolacinski <karol.kolacinski at intel.com>
>
> Quad registers are read/written incorrectly. E825 devices always use quad 0 address and differentiate between the PHYs by changing SBQ destination device (phy_0 or phy_0_peer).
>
> Add helpers for reading/writing PTP registers shared per quad and use correct quad address and SBQ destination device based on port.
>
> Fixes: 7cab44f1c35f ("ice: Introduce ETH56G PHY model for E825C products")
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski at intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski at intel.com>
> Signed-off-by: Grzegorz Nitka <grzegorz.nitka at intel.com>
> ---
> V3 -> V4: Removed unrelated refactor/cleanup code
> V2 -> V3: Replaced lower/upper_32_bits calls with lower/upper_16_bits
> V1 -> V2: Fixed kdoc issues
>
>  drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 226 ++++++++++++--------
>  drivers/net/ethernet/intel/ice/ice_type.h   |   1 -
>  2 files changed, 137 insertions(+), 90 deletions(-)
>

Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha at intel.com> (A Contingent worker at Intel)