[Intel-wired-lan] [PATCH v2 iwl-next 02/10] ice: rename TSPLL and CGU functions and definitions

[Simon Horman]

On Wed, Apr 09, 2025 at 02:24:59PM +0200, Karol Kolacinski wrote:
> Rename TSPLL and CGU functions, definitions etc. to match the file name
> and have consistent naming scheme.
> 
> Reviewed-by: Michal Kubiak <michal.kubiak at intel.com>
> Reviewed-by: Milena Olech <milena.olech at intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski at intel.com>

...

> diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.h b/drivers/net/ethernet/intel/ice/ice_tspll.h
> index 181ca24a2739..0e28e97e09be 100644
> --- a/drivers/net/ethernet/intel/ice/ice_tspll.h
> +++ b/drivers/net/ethernet/intel/ice/ice_tspll.h
> @@ -2,16 +2,16 @@
>  #define _ICE_TSPLL_H_
>  
>  /**
> - * struct ice_cgu_pll_params_e82x - E82X CGU parameters
> + * struct ice_tspll_params_e82x

nit: tooling expects a short description here.

Flagged by ./scripts/kernel-doc -none

>   * @refclk_pre_div: Reference clock pre-divisor
>   * @feedback_div: Feedback divisor
>   * @frac_n_div: Fractional divisor
>   * @post_pll_div: Post PLL divisor
>   *
>   * Clock Generation Unit parameters used to program the PLL based on the
> - * selected TIME_REF frequency.
> + * selected TIME_REF/TCXO frequency.
>   */
> -struct ice_cgu_pll_params_e82x {
> +struct ice_tspll_params_e82x {
>  	u32 refclk_pre_div;
>  	u32 feedback_div;
>  	u32 frac_n_div;
> @@ -19,25 +19,25 @@ struct ice_cgu_pll_params_e82x {
>  };
>  
>  /**
> - * struct ice_cgu_pll_params_e825c - E825C CGU parameters
> - * @tspll_ck_refclkfreq: tspll_ck_refclkfreq selection
> - * @tspll_ndivratio: ndiv ratio that goes directly to the pll
> - * @tspll_fbdiv_intgr: TS PLL integer feedback divide
> - * @tspll_fbdiv_frac:  TS PLL fractional feedback divide
> - * @ref1588_ck_div: clock divider for tspll ref
> + * struct ice_tspll_params_e825c

Ditto.

> + * @ck_refclkfreq: ck_refclkfreq selection
> + * @ndivratio: ndiv ratio that goes directly to the PLL
> + * @fbdiv_intgr: TSPLL integer feedback divisor
> + * @fbdiv_frac: TSPLL fractional feedback divisor
> + * @ref1588_ck_div: clock divisor for tspll ref
>   *
>   * Clock Generation Unit parameters used to program the PLL based on the
>   * selected TIME_REF/TCXO frequency.
>   */
> -struct ice_cgu_pll_params_e825c {
> -	u32 tspll_ck_refclkfreq;
> -	u32 tspll_ndivratio;
> -	u32 tspll_fbdiv_intgr;
> -	u32 tspll_fbdiv_frac;
> +struct ice_tspll_params_e825c {
> +	u32 ck_refclkfreq;
> +	u32 ndivratio;
> +	u32 fbdiv_intgr;
> +	u32 fbdiv_frac;
>  	u32 ref1588_ck_div;
>  };

...